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[[File:Manticore concept.png|thumb]]
 
[[File:Manticore concept.png|thumb]]
 
==Project Overview==
 
==Project Overview==
So far, we have implemented inference of various smaller networks on our PULP-based systems ([pulp-nn]). The data-intensive training of DNN was too memory-hungry to be implemented on our systems. Our latest architecture concept called Manticore includes 4096 snitch cores (snitch, manticore paper), is chiplet-based and includes HBM2 memory (see Image).
 
  
Recently, industry and academia have started exploring the required computational precision for training. Many state-of-the-art training hardware platforms support by now not only 64-bit and 32-bit floating-point formats, but also 16-bit floating-point formats (binary16 by IEEE and brainfloat). Recent work proposes various training formats such as 8-bit floats.
+
The Snitch ecosystem [1] targets energy-efficient high-performance systems, like the Manticore concept [2] including 4096 snitch cores. We plan to tape out a slightly smaller version of Manticore, called Occamy, a two-chiplet system in the near future. Snitch-based architectures are built around the minimal RISC-V Snitch integer core, only about 15 thousand gates in size, which is tightly coupled to accelerators such as an FPU or a DMA engine.
  
Most available DL frameworks allow to train networks with 64-bit, 32-bit or 16-bit FP formats. However, the FPU of our Occamy project (scaled-down version of Manticore) supports two different types of 16-bit FP formats and two different types of 8-bit FP formats. Therefore, we would like to extend an available DL training framework (e.g., Pytorch) with a library (e.g., flexfloat [ref]) capable of emulating various FP formats
+
Recently, industry and academia have started exploring the required computational precision for training. Many state-of-the-art training hardware platforms support by now not only 64-bit and 32-bit floating-point formats, but also 16-bit floating-point formats (binary16 by IEEE and brainfloat). Recent work proposes various training formats such as 8-bit floats [3,4,5].
  
 +
Most available DL frameworks allow to train networks with 64-bit, 32-bit or 16-bit FP formats. However, the FPU of our Occamy project supports two different types of 16-bit FP formats and two different types of 8-bit FP formats. Therefore, we would like to extend an available DL training framework (e.g., Pytorch) with a library (e.g., flexfloat [5]) capable of emulating various FP formats. Depending on your skills and the project type (SA or MA) this work can be extended by training various networks for various FP formats.
  
===Status: Available ===
+
 
: Looking for 1 Semester or 1 Master student
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===Literature===
: Contact: [[:User:Paulin | Gianna Paulin]], [[:User:fischeti|Tim Fischer]]
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* [https://github.com/pulp-platform/snitch] Snitch Github
 +
* [https://ieeexplore.ieee.org/abstract/document/9296802] Manticore
 +
* [https://openreview.net/forum?id=HkxIKNSeIH] Hybrid 8-bit Floating Point (HFP8) Training and Inference for Deep Neural Networks
 +
* [https://proceedings.neurips.cc/paper/2018/file/335d3d1cd7ef05ec77714a215134914c-Paper.pdf] Training deep neural networks with 8-bit floating point numbers
 +
* [https://arxiv.org/abs/1905.12334] Mixed precision training with 8-bit floating point
 +
* [https://github.com/oprecomp/flexfloat] Flexfloat Github
 +
 
 +
 
 +
===Status: In Progress ===
 +
* Looking for 1 Semester or 1 Master student
 +
* Contact: [[:User:Paulin | Gianna Paulin]], [[:User:fischeti|Tim Fischer]]
  
 
===Prerequisites===
 
===Prerequisites===
: Machine Learning
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* Deep Learning
: Python
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* Python
: C
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* C
  
 
<!--  
 
<!--  
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: Supervision: [[:User:Mluisier | Mathieu Luisier]]
 
: Supervision: [[:User:Mluisier | Mathieu Luisier]]
 
--->
 
--->
 
 
===Prerequisites===
 
* Deep Learning
 
* Python
 
* C
 
  
 
===Character===
 
===Character===
: 25% Theory
+
* 25% Theory
: 75% Implementation
+
* 75% Implementation
  
 
===Professor===
 
===Professor===
: [http://www.iis.ee.ethz.ch/people/person-detail.html?persid=194234 Luca Benini]
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* [http://www.iis.ee.ethz.ch/people/person-detail.html?persid=194234 Luca Benini]
  
  
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==== Report / Presentation ====
 
==== Report / Presentation ====
  
Documentation is an important and often overlooked aspect of engineering. One final report has to be completed within this project. Any form of word processing software is allowed for writing the reports, nevertheless, the use of LaTeX with Tgif, drawoio (See: http://bourbon.usc.edu:8001/tgif/index.html and http://www.dz.ee.ethz.ch/en/information/how-to/drawing-schematics.html) or any other vector drawing software (for block diagrams) is strongly encouraged by the IIS staff.
+
Documentation is an important and often overlooked aspect of engineering. One final report has to be completed within this project. Any form of word processing software is allowed for writing the reports, nevertheless, the use of LaTeX with Tgif, drawio or any other vector drawing software (for block diagrams) is strongly encouraged by the IIS staff.
  
 
====== Final Report ======
 
====== Final Report ======
Line 59: Line 63:
  
 
At the end of the project, the outcome of the thesis will be presented in a 15 (SA) or 20-minutes (MA) talk and 5 minutes of discussion in front of interested people of the Integrated Systems Laboratory. The presentation is open to the public, so you are welcome to invite interested friends. The exact date will be determined towards the end of the work.
 
At the end of the project, the outcome of the thesis will be presented in a 15 (SA) or 20-minutes (MA) talk and 5 minutes of discussion in front of interested people of the Integrated Systems Laboratory. The presentation is open to the public, so you are welcome to invite interested friends. The exact date will be determined towards the end of the work.
 
 
==Links==
 
 
  
  
 
[[Category:Deep Learning Acceleration]]
 
[[Category:Deep Learning Acceleration]]
 
[[Category:Deep Learning Projects]]
 
[[Category:Deep Learning Projects]]
[[Category:Available]]
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[[Category:In progress]]
 
[[Category:Software]]
 
[[Category:Software]]
 
[[Category:Digital]]
 
[[Category:Digital]]

Latest revision as of 09:44, 17 August 2022

Manticore concept.png

Project Overview

The Snitch ecosystem [1] targets energy-efficient high-performance systems, like the Manticore concept [2] including 4096 snitch cores. We plan to tape out a slightly smaller version of Manticore, called Occamy, a two-chiplet system in the near future. Snitch-based architectures are built around the minimal RISC-V Snitch integer core, only about 15 thousand gates in size, which is tightly coupled to accelerators such as an FPU or a DMA engine.

Recently, industry and academia have started exploring the required computational precision for training. Many state-of-the-art training hardware platforms support by now not only 64-bit and 32-bit floating-point formats, but also 16-bit floating-point formats (binary16 by IEEE and brainfloat). Recent work proposes various training formats such as 8-bit floats [3,4,5].

Most available DL frameworks allow to train networks with 64-bit, 32-bit or 16-bit FP formats. However, the FPU of our Occamy project supports two different types of 16-bit FP formats and two different types of 8-bit FP formats. Therefore, we would like to extend an available DL training framework (e.g., Pytorch) with a library (e.g., flexfloat [5]) capable of emulating various FP formats. Depending on your skills and the project type (SA or MA) this work can be extended by training various networks for various FP formats.


Literature

  • [1] Snitch Github
  • [2] Manticore
  • [3] Hybrid 8-bit Floating Point (HFP8) Training and Inference for Deep Neural Networks
  • [4] Training deep neural networks with 8-bit floating point numbers
  • [5] Mixed precision training with 8-bit floating point
  • [6] Flexfloat Github


Status: In Progress

Prerequisites

  • Deep Learning
  • Python
  • C


Character

  • 25% Theory
  • 75% Implementation

Professor


Project Organization

Weekly Meetings

The student shall meet with the advisor(s) every week in order to discuss any issues/problems that may have persisted during the previous week and with a suggestion of next steps. These meetings are meant to provide a guaranteed time slot for mutual exchange of information on how to proceed, clear out any questions from either side and to ensure the student’s progress.

Report / Presentation

Documentation is an important and often overlooked aspect of engineering. One final report has to be completed within this project. Any form of word processing software is allowed for writing the reports, nevertheless, the use of LaTeX with Tgif, drawio or any other vector drawing software (for block diagrams) is strongly encouraged by the IIS staff.

Final Report

A digital copy of the report, the presentation, the developed software, build script/project files, drawings/illustrations, acquired data, etc. needs to be handed in at the end of the project. Note that this task description is part of your report and has to be attached to your final report.

Presentation

At the end of the project, the outcome of the thesis will be presented in a 15 (SA) or 20-minutes (MA) talk and 5 minutes of discussion in front of interested people of the Integrated Systems Laboratory. The presentation is open to the public, so you are welcome to invite interested friends. The exact date will be determined towards the end of the work.↑ top