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Short Description

In recent years, energy efficiency has become paramount in the design embedded systems. Heterogeneity has been a common approach to reach this goal in high-end systems. In this project, your main task will be to design and implement an energy-aware task mapping framework for next-generation heterogeneous MCU platforms.

On-going work in our group has simulated an MCU composed of two cores manufactured with different design margins: one worst-case and one typical. The resulting power heterogeneity can be leveraged to reduce the total energy consumption, while giving the programmer the appearance of single-core system. By exploiting task-level parallelism, a typical application can be mapped to both cores. This results in a lower active time, allowing the system to enter a low-power sleep mode, and reduce the total energy consumption.

The main focus of this work will be to demonstrate the potential energy savings of a task mapping framework on a commercial platform from an industrial partner, NXP Semiconductors. Initially, it is important to understand the power consumption of the board’s components and build an accurate power model. Moreover, it will be necessary to evaluate different interprocessor communication mechanisms, implement them, and characterize their overhead. In particular the goals of the project can be summarized as follows:

  1. The acquisition of detailed power consumption characterization from our commercial board
  2. Design and implementation of a task mapping framework for homogeneous architectures
  3. Characterization of the time/memory overhead incurred by the inter-processor communication.
  4. Extension of the task mapping framework to heterogeneous architectures
  5. Demonstrate the energy efficiency of the proposed frameworks


You should have experience with Matlab and be familiar with embedded C programming.
Knowledge about microcontrollers would be an asset.

Status: Completed

Spring/Fall Semester 201X (sem1XhY)
Student 1, Student 2


30% Theory
50-60% Implementation
20-10% Testing

Practical Details