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About the Huawei Future Computing Laboratory

With 18 sites across Europe and 1500 researchers, Huawei’s European Research Institute (ERI) oversees fundamental and applied technology research, academic research cooperation projects, and strategic technical planning across our network of European R&D facilities. Huawei’s ERI includes the new Zurich Research Center (ZRC), located in Zurich, Switzerland. A major element of ZRC is a new research laboratory focused on fundamental research in the area of future computing systems (new hardware, new software, new algorithms).

The research work of the lab will be carried out not only by Huawei’s internal research staff but also by our academic research partners in universities across Europe. The lab will provide an “open research environment” where academics will be encouraged to visit and work on fundamental long-term research alongside Huawei staff in an environment that, like the best universities and research institutes, is open and conducive to such scientific work.

Internship Digital VLSI Design for ML Acceleration

For this new ZRC Laboratory, we are currently looking for an outstanding Digital VLSI Design Intern. As a key member in our motivated and multicultural team, you will support to design and evaluate novel VLSI architectures for low-power machine learning acceleration.

Your Responsibilities

  • Design and Implementation of Digital VLSI HW architecture (RTL) for Machine Learning Acceleration
  • Mapping of data, parameters and computations from a ML framework to the HW Accelerator.
  • Synthesis and Backend/Layout and gate-level power simulation
  • Scientific evaluation and potential publication.

Requirements - Your background

  • You are currently enrolled in a Master’s degree or PhD in electrical engineering, compute engineering or computer science, or any related fields at a reputable university; or you graduated within the last six months
  • Solid Digital VLSI Design knowledge Front-end and preferably also Back-end (e.g., taught at Universities, like VLSI I-II from ETH Zurich)
  • You have worked on a VLSI project and used industry-standard tools like Design Compiler, Innovus, Modelsim or similar.
  • Basic knowledge in computer arithmetics.
  • Basic knowledge in machine learning is an asset.
  • Strong coding and scripting skills (SystemVerilog/VHDL, Python, TCL, Bash etc.)
  • Excellent communication and writing skills in English

Interested to develop with us the next generation of machine learning hardware, then apply here

Available Projects

We are inviting applications from students to conduct their master’s thesis work or an internship project at the Huawei Future Computing Lab in Zurich on these exciting new topics.

Type Project Description Topic Workload Type Contact
Internship Digital VLSI Design Intern (ML Acceleration) Link to description AI Acceleration digital VLSI design Dr. Andri
Internship High-Performance Machine Learning Kernel Development Link to description AI Acceleration hardware-level SW development Dr. Andri, Dr. Cavigelli


Internship at Huawei Research in Zurich-Oerlikon
Contact (at Huawei RC Zurich): Dr. Renzo Andri, at huawei com
Contact (at Huawei RC Zurich): Dr. Lukas Cavigelli, at huawei com