About the Huawei Future Computing Laboratory
With 18 sites across Europe and 1500 researchers, Huawei’s European Research Institute (ERI) oversees fundamental and applied technology research, academic research cooperation projects, and strategic technical planning across our network of European R&D facilities. Huawei’s ERI includes the new Zurich Research Center (ZRC), located in Zurich, Switzerland. A major element of ZRC is a new research laboratory focused on fundamental research in the area of future computing systems (new hardware, new software, new algorithms).
Internship Digital VLSI Design for ML Acceleration (Taken)
This internship has been taken, if you are interested in similar topics, get in contact with us.
For the new ZRC Laboratory, we were looking for an outstanding Digital VLSI Design Intern. As a key member in our motivated and multicultural team, you will support to design and evaluate novel VLSI architectures for energy-efficient machine learning acceleration.
- Design and Implementation of Digital VLSI HW architecture (RTL) for Machine Learning Acceleration
- Mapping of data, parameters and computations from a ML framework to the HW Accelerator.
- Synthesis and Backend/Layout and gate-level power simulation
- Scientific evaluation and potential publication.
Requirements - Your background
- You are currently enrolled in a Master’s degree or PhD in electrical engineering, compute engineering or computer science, or any related fields at a reputable university; or you graduated within the last six months
- Solid Digital VLSI Design knowledge Front-end and preferably also Back-end (e.g., VLSI I-II)
- You have worked on a VLSI project (e.g., semester/master thesis at IIS) and used industry-standard tools like Design Compiler, Innovus, Modelsim or similar.
- Basic knowledge in computer arithmetics.
- Basic knowledge in machine learning is an asset.
- Strong coding and scripting skills (SystemVerilog/VHDL, Python, TCL, Bash etc.)
- Excellent communication and writing skills in English
Interested to develop with us the next generation of machine learning hardware, then apply here
We are inviting applications from students to conduct their master’s thesis work or an internship project at the Huawei Future Computing Lab in Zurich on these exciting new topics. We are open to discuss also other topics. We are also supervising master's and semester theses in collaboration with the Integrated Systems Laboratory. Feel free to contact us, we are happy to hear from you.
|Internship||Digital VLSI Design Intern (ML Acceleration)||Link to description||AI Acceleration||digital VLSI design||Dr. Andri|
|Internship||High-Performance Machine Learning Kernel Development||Link to description||AI Acceleration||hardware-level SW development||Dr. Andri, Dr. Cavigelli|
- Internship at Huawei Research in Zurich-Oerlikon
- Contact (at Huawei RC Zurich): Dr. Renzo Andri, surname.name at huawei com
- Contact (at Huawei RC Zurich): Dr. Lukas Cavigelli, surname.name at huawei com