Integrating an Open-Source Double-Precision Floating-Point DivSqrt Unit into CVFPU (1S)
- Type: Semester Thesis (1 or 2 students)
- Professor: Prof. Dr. L. Benini
Floating-point (FP) arithmetic is fundamental for a large set of applications spanning from high-performance computing to neural network training. A flexible highly-parametrized open-source floating-point unit (FPU) called FPnew (today known as CVFPU) [1,2] has been developed at IIS.
FPnew is optimized for high-performance and energy efficiency. It is internally organized in modules, each one carrying out one operation group (add/mul, divsqrt, cast, comparisons, dot-product).
Recently, T-Head open sourced a set of processors. The goal of this project is to evaluate the double-precision DivSqrt unit included in the open-source T-head OpenC910  processor and integrate it into CVFPU.
- Investigation of the T-Head OpenC910 FP DivSqrt module and its fundamental blocks
- RTL integration of T-Head OpenC910 FP DivSqrt module into CVFPU
- Evaluation of the FP DivSqrt module and the enhanced CVFPU
- 20% Architecture review
- 40% RTL implementation
- 40% Evaluation
- Strong interest in computer architecture
- Experience with digital design in SystemVerilog as taught in VLSI I
- Experience with ASIC implementation flow (synthesis) as taught in VLSI II
 Mach, S., Schuiki, F., Zaruba, F., & Benini, L. (2020). FPnew: An Open-Source Multiformat Floating-Point Unit Architecture for Energy-Proportional Transprecision Computing. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 29(4), 774-787. (https://ieeexplore.ieee.org/abstract/document/9311229)