Difference between pages "Active-Set QP Solver on FPGA" and "LAPACK/BLAS for FPGA"
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==Short Description== | ==Short Description== | ||
− | The master thesis will be carry on in collaboration with [http://www.abb.ch/cawp/abbzh254/ec72bb280fd24d47c1256b5700522f3a.aspx ABB CHCRC] and will focus on the | + | The master thesis will be carry on in collaboration with [http://www.abb.ch/cawp/abbzh254/ec72bb280fd24d47c1256b5700522f3a.aspx ABB CHCRC] and will focus on the acceleration of specific LAPACK/BLAS kernels on FPGA. |
− | + | The LAPACK and BLAS libraries have been developed decades ago to perform standard linear algebra operations in an efficient and reliable way. Aim of this thesis is to identify a subset of these routines that are naturally suited to be executed on an FPGA. Out of this subset, a few simple operations are to be implemented on an FPGA, while the implementation is generic enough to take into account actual problem data size as well as resource constraints imposed by the actual FPGA hardware. | |
===Status: Available === | ===Status: Available === | ||
: Looking for Interested Students | : Looking for Interested Students | ||
− | : Type: Master Thesis | + | : Type: Master- or Semester Thesis |
: Supervisors: [[:User:Barandre|Andrea Bartolini]], [[:User:schaffner|Michael Schaffner]] | : Supervisors: [[:User:Barandre|Andrea Bartolini]], [[:User:schaffner|Michael Schaffner]] | ||
===Prerequisites=== | ===Prerequisites=== | ||
− | : VLSI I, VLSI II | + | : VLSI I, VLSI II |
: Matlab, C++, VHDL or System Verilog | : Matlab, C++, VHDL or System Verilog | ||
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− | [[Category:Hot]] [[Category:Digital]] [[Category:Master Thesis]] [[Category:Available]] [[Category:Accelerator]] [[Category:FPGA]] [[Category:SBB CHCRC]] [[Category:Model Predictive Controller]] | + | [[Category:Hot]] [[Category:Digital]] [[Category:Master Thesis]] [[Category:Available]] [[Category:Accelerator]] [[Category:FPGA]] [[Category:SBB CHCRC]] [[Category:Model Predictive Controller]] [[Category:least-square fitting]] |
Revision as of 11:33, 12 January 2015
Contents
Short Description
The master thesis will be carry on in collaboration with ABB CHCRC and will focus on the acceleration of specific LAPACK/BLAS kernels on FPGA.
The LAPACK and BLAS libraries have been developed decades ago to perform standard linear algebra operations in an efficient and reliable way. Aim of this thesis is to identify a subset of these routines that are naturally suited to be executed on an FPGA. Out of this subset, a few simple operations are to be implemented on an FPGA, while the implementation is generic enough to take into account actual problem data size as well as resource constraints imposed by the actual FPGA hardware.
Status: Available
- Looking for Interested Students
- Type: Master- or Semester Thesis
- Supervisors: Andrea Bartolini, Michael Schaffner
Prerequisites
- VLSI I, VLSI II
- Matlab, C++, VHDL or System Verilog
Character
- 20% Theory
- 60% Implementation
- 20% Testing