| Display title | MCU Bus and Memory Generator: implementation of a Highly Configurable bus and memory subsystem for a RISC-V based microcontroller. |
| Default sort key | MCU Bus and Memory Generator: implementation of a Highly Configurable bus and memory subsystem for a RISC-V based microcontroller. |
| Page length (in bytes) | 8,411 |
| Page ID | 1747 |
| Page content language | English (en) |
| Page content model | wikitext |
| Indexing by robots | Allowed |
| Number of redirects to this page | 0 |
| Counted as a content page | Yes |
| Edit | Allow all users (infinite) |
| Move | Allow all users (infinite) |
| Page creator | Pschiavo (talk | contribs) |
| Date of page creation | 17:26, 15 August 2022 |
| Latest editor | Fischeti (talk | contribs) |
| Date of latest edit | 14:44, 23 October 2023 |
| Total number of edits | 10 |
| Total number of distinct authors | 3 |
| Recent number of edits (within past 90 days) | 0 |
| Recent number of distinct authors | 0 |
