Revision as of 11:53, 3 February 2014

In this page you will find student and research projects at the Integrated Systems Laboratory of the ETH Zurich.

The IIS Consists of 4 main research groups

• Analog and Mixed Signal Design
• IC and Systems, Design and Test
• Nano Electronics and Nano Photonics
• Nano-TCAD

On this webpage you can find links to

• Projects for which we are looking for students
• Projects that have been completed in the past
• List of Research projects

Projects in Progress

Digital Design

• Resource Partitioning of Caches
• Enabling Efficient Systolic Execution on MemPool (M)
• Ultrasound based hand gesture recognition
• Development of statistics and contention monitoring unit for PULP
• Efficient Execution of Transformers in RISC-V Vector Machines with Custom HW acceleration (M)
• Implementing Configurable Dual-Core Redundancy
• Developing a Transposition Unit to Accelerate ML Workloads (1-3S/B)
• Fitting Power Consumption of an IP-based HLS Approach to Real Hardware (1-3S)
• Extension and Evaluation of TinyDMA (1-2S/B/2-3G)
• Wireless EEG Acquisition and Processing
• Resource-Constrained Few-Shot Learning for Keyword Spotting (1S)
• Ternary Neural Networks for Face Recognition
• Evaluating SoA Post-Training Quantization Algorithms
• ASIC Development of 5G-NR LDPC Decoder
• Efficient TNN compression
• Coherence-Capable Write-Back L1 Data Cache for Ariane (M)
• Event-Driven Vision on an embedded platform
• An all Standard-Cell Based Energy Efficient HW Accelerator for DSP and Deep Learning Applications
• Channel Estimation for 5G Cellular IoT and Fast Fading Channels

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Links to Other IIS Webpages

http://www.iis.ee.ethz.ch

Integrated Systems Laboratory Main homepage

http://lne.ee.ethz.ch

Laboratory for Nanoelectronics homepage

http://www.nano-tcad.ethz.ch

Nano-TCAD group homepage

http://www.dz.ee.ethz.ch

Microelectronics Design Center

http://asic.ethz.ch/cg

The IIS-ASIC Chip Gallery

http://eda.ee.ethz.ch

EDA Wiki (ETH Zurich internal access only!)