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From iis-projects
Welcome to IIS-Projects
In this page you will find student and research projects at the Integrated Systems Laboratory of the ETH Zurich.
The IIS Consists of 4 main research groups
- Analog and Mixed Signal Design
- IC and Systems, Design and Test
- Nano Electronics and Nano Photonics
- Nano-TCAD
On this webpage you can find links to
- Projects for which we are looking for students
- Projects that have been completed in the past
- List of Research projects
Projects in Progress
Digital Design
- ASR-Waveformer
- A RISC-V ISA Extension for Scalar Chaining in Snitch (M)
- Investigation of Quantization Strategies for Retentive Networks (1S)
- Fault-Tolerant Floating-Point Units (M)
- Efficient collective communications in FlooNoC (1M)
- A RISC-V fault-tolerant many-core accelerator for 5G Non-Terrestrial Networks (1-2S/B)
- Vector-based Manycore HPC Cluster Exploration for 5G Communication Algorithm (1-2M)
- Streaming Layer Normalization in ITA (M/1-2S)
- 3D Matrix Multiplication Unit for ITA (1S)
- Physical Implementation of ITA (2S)
- Designing a Scalable Miniature I/O DMA (1-2B/1-3S/M)
- Ultrasound-EMG combined hand gesture recognition
- Accelerating Matrix Multiplication on a 216-core MPSoC (1M)
- Creating A Technology-independent USB1.0 Host Implementation Targetting ASICSs (1-3S/B)
- A RISC-V ISA Extension for Pseudo Dual-Issue Monte Carlo in Snitch (1M/2S)
- Implementation of a Cache Reliability Mechanism (1S/M)
- On - Device Continual Learning for Seizure Detection on GAP9
- On-Board Software for PULP on a Satellite
- Big Data Analytics Benchmarks for Ara
- Radiation Testing of a PULP ASIC
Links to Other IIS Webpages
- http://www.iis.ee.ethz.ch
- Integrated Systems Laboratory Main homepage
- http://lne.ee.ethz.ch
- Laboratory for Nanoelectronics homepage
- http://www.nano-tcad.ethz.ch
- Nano-TCAD group homepage
- http://www.dz.ee.ethz.ch
- Microelectronics Design Center
- http://asic.ethz.ch/cg
- The IIS-ASIC Chip Gallery
- http://eda.ee.ethz.ch
- EDA Wiki (ETH Zurich internal access only!)