Main Page
From iis-projects
Welcome to IIS-Projects
In this page you will find student and research projects at the Integrated Systems Laboratory of the ETH Zurich.
This is a uncompleted page.
ls -l
The IIS Consists of 4 main research groups
- Analog and Mixed Signal Design
- IC and Systems, Design and Test
- Nano Electronics and Nano Photonics
- Nano-TCAD
On this webpage you can find links to
- Projects for which we are looking for students
- Projects that have been completed in the past
- List of Research projects
Projects in Progress
Digital Design
- Investigation of Quantization Strategies for Retentive Networks (1S)
- Low Precision Ara for ML
- Vector-based Manycore HPC Cluster Exploration for 5G Communication Algorithm (1-2M)
- Streaming Layer Normalization in ITA (M/1-2S)
- Ultrasound-EMG combined hand gesture recognition
- Accelerating Matrix Multiplication on a 216-core MPSoC (1M)
- Creating A Technology-independent USB1.0 Host Implementation Targetting ASICSs (1-3S/B)
- A RISC-V ISA Extension for Pseudo Dual-Issue Monte Carlo in Snitch (1M/2S)
- On - Device Continual Learning for Seizure Detection on GAP9
- Integrating an Open-Source Double-Precision Floating-Point DivSqrt Unit into CVFPU (1S)
- A reduction-capable AXI XBAR for fast M-to-1 communication (1M)
- Feature Extraction and Architecture Clustering for Keyword Spotting (1S)
- Big Data Analytics Benchmarks for Ara
- Radiation Testing of a PULP ASIC
- Virtual Memory Ara
- Runtime partitioning of L1 memory in Mempool (M)
- Ultrasound Doppler system development
- New RVV 1.0 Vector Instructions for Ara
- Ternary Neural Networks for Face Recognition
- ASIC Development of 5G-NR LDPC Decoder
- Efficient TNN compression
- Coherence-Capable Write-Back L1 Data Cache for Ariane (M)
- Event-Driven Vision on an embedded platform
- An all Standard-Cell Based Energy Efficient HW Accelerator for DSP and Deep Learning Applications
- Channel Estimation for 5G Cellular IoT and Fast Fading Channels
Links to Other IIS Webpages
- http://www.iis.ee.ethz.ch
- Integrated Systems Laboratory Main homepage
- http://lne.ee.ethz.ch
- Laboratory for Nanoelectronics homepage
- http://www.nano-tcad.ethz.ch
- Nano-TCAD group homepage
- http://www.dz.ee.ethz.ch
- Microelectronics Design Center
- http://asic.ethz.ch/cg
- The IIS-ASIC Chip Gallery
- http://eda.ee.ethz.ch
- EDA Wiki (ETH Zurich internal access only!)