Difference between revisions of "Marco Bertuletti"
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== Marco Bertuletti == | == Marco Bertuletti == | ||
Revision as of 15:11, 9 August 2022
Marco Bertuletti
I completed my B.Sc. and M.Sc. in Electronics Engineering at Politecnico di Milano in July 2019 and December 2021, respectively. Since March 2022, I am pursuing a Ph.D. in the Circuits and Systems group of Prof. Luca Benini.
Interests
My main research interests are:
- Computer and System Architecture
- Parallel Programming
- Manycore systems
Contact Information
- Office: ETZ J71.2
- e-mail: mbertuletti@iis.ee.ethz.ch
- www: Marco Bertuletti (ETH page)
Projects
Available Projects
- A RISC-V fault-tolerant many-core accelerator for 5G Non-Terrestrial Networks (1-2S/B)
- Advanced Physical Design: Reinforcement Learning for Macro Placement and Mix-Placer (B/1-2S)
- All the flavours of FFT on MemPool (1-2S/B)
- RedCap-5G for IOT application on prototype taped-out silicon
- Vector-based Parallel Programming Optimization of Communication Algorithm (1-2S/B)
