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Marco Bertuletti

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I completed my B.Sc. and M.Sc. in Electronics Engineering at Politecnico di Milano in July 2019 and December 2021, respectively. Since March 2022, I am pursuing a Ph.D. in the Circuits and Systems group of Prof. Luca Benini.

Research interests

My main research interests are:

  • Computer and System Architecture
  • Parallel Programming
  • Manycore systems

I work with Huawei Sweden on the implementation of 5G physical uplink shared channel on Mempool and Terapool. These two IIS born manycore architectures have respectively 256 and 1024 cores, sharing a large L1 data memory.

Contact

Projects

Available Projects