Difference between revisions of "Michael Rogenmoser"
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Revision as of 13:19, 25 January 2022
I finished my B.Sc. and M.Sc. in electrical engineering at ETH Zürich in 2020 and 2021, respectively. Since summer 2021, I am pursuing a Ph.D. in the Circuits and Systems group of Prof. Luca Benini.
My main research areas are:
- Fault Tolerant architectures for Space
- Multicore processors
- Reliability in SoCs
If you are interested any projects, or would like to chat about space, feel free to send me an email or drop by my office.
- e-mail: email@example.com
- phone: +41 44 632 54 33
- office: ETZ J71.2
- github: micprog
- Creating a Free and Open-Source Verification Environment for Our New DMA Engine (1-3S/B)
- Design of an Area-Optimized Soft-Error Resilient Processing Core for Safety-Critical Systems (1M)
- Enhancing our DMA Engine with Fault Tolerance
- Radiation Testing of a PULP ASIC
- Running Rust on PULP
- Towards Formal Verification of the iDMA Engine (1-3S/B)
Projects In Progress