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(Created page with "thumb|600px ==Short Description== TD-SCDMA is a 3GPP standard that combines an advanced TDMA/TDD system with an adaptive CDMA...")
 
 
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TD-SCDMA is a 3GPP standard that combines an advanced TDMA/TDD system with an adaptive CDMA component operating in a synchronous mode. Its TDD nature allows to master asymmetric services more efficiently than other 3G standards. Up- and downlink resources are flexibly assigned according to traffic needs, and a flexible data rate upto 2.8Mbit/s is provided. Which is helpful in an environment with increasing data traffic, which tends to be asymmetric (mobile Internet). In order to bring this to practice, clever Multiuser detection and equalization techniques have to be deployed at the UE. In this thesis, novel and well-known techniques shall be implemented and investigated with focus on their performance-complexity tradeoff and their performance limitations in realistic conditions. Therefore, Matlab blocks have to be implemented and integrated within our TD-SCDMA simulation chain, followed by implementation in VHDL code. Finally, the design has to be synthesized and optimized.  
 
TD-SCDMA is a 3GPP standard that combines an advanced TDMA/TDD system with an adaptive CDMA component operating in a synchronous mode. Its TDD nature allows to master asymmetric services more efficiently than other 3G standards. Up- and downlink resources are flexibly assigned according to traffic needs, and a flexible data rate upto 2.8Mbit/s is provided. Which is helpful in an environment with increasing data traffic, which tends to be asymmetric (mobile Internet). In order to bring this to practice, clever Multiuser detection and equalization techniques have to be deployed at the UE. In this thesis, novel and well-known techniques shall be implemented and investigated with focus on their performance-complexity tradeoff and their performance limitations in realistic conditions. Therefore, Matlab blocks have to be implemented and integrated within our TD-SCDMA simulation chain, followed by implementation in VHDL code. Finally, the design has to be synthesized and optimized.  
  
===Status: Available ===
+
===Status: Completed ===
: Looking for project partner
+
: For similar projects contact us!
: Contact: [http://iis-projects.ee.ethz.ch/index.php/User:Badawi Karim Badawi]
+
: Contact: [[User:Badawi|Karim Badawi]]
===Prerequisities===
+
 
 +
===Prerequisites===
 
: VLSI I
 
: VLSI I
 
: Interest in Mobile Communications
 
: Interest in Mobile Communications
 
: Matlab and VHDL knowledge
 
: Matlab and VHDL knowledge
 
<!--
 
===Status: Completed ===
 
: Fall Semester 2014 (sem13h2)
 
: Matthias Baer, Renzo Andri
 
--->
 
<!--
 
===Status: In Progress ===
 
: Student A, StudentB
 
: Supervision: [http://iis-projects.ee.ethz.ch/index.php/User:Badawi Karim Badawi]
 
--->
 
===Character===
 
: 25% Theory
 
: 25% Simulation
 
: 25% Architecture/VHDL
 
: 25% ASIC Implementation
 
  
 
===Professor===
 
===Professor===
<!-- : [http://www.iis.ee.ethz.ch/portrait/staff/lbenini.en.html Luca Benini] --->
 
 
: [http://www.iis.ee.ethz.ch/portrait/staff/huang.en.html Qiuting Huang]
 
: [http://www.iis.ee.ethz.ch/portrait/staff/huang.en.html Qiuting Huang]
<!-- : [http://lne.ee.ethz.ch/en/general-information/people/professor.html Vanessa Wood] --->
 
<!-- : [http://www.iis.ee.ethz.ch/portrait/staff/mluisier.en.html Mathieu Luisier] --->
 
<!-- : [http://www.iis.ee.ethz.ch/portrait/staff/schenk.en.html Andreas Schenk] --->
 
<!-- : [http://www.dz.ee.ethz.ch/en/general-information/about/staff/uid/364.html Hubert Kaeslin] --->
 
 
==Detailed Task Description==
 
 
===Goals===
 
===Practical Details===
 
* '''[[Project Plan]]'''
 
* '''[[Project Meetings]]'''
 
* '''[[Design Review]]'''
 
* '''[[Coding Guidelines]]'''
 
* '''[[Final Report]]'''
 
* '''[[Final Presentation]]'''
 
 
==Results==
 
  
==Links==
 
  
 
[[Category:Digital]]
 
[[Category:Digital]]
 
[[Category:Master Thesis]]
 
[[Category:Master Thesis]]
[[Category:Available]]
 
 
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COPY PASTE FROM THE LIST BELOW TO ADD TO CATEGORIES
 
 
GROUP
 
[[Category:Digital]]
 
[[Category:Analog]]
 
[[Category:TCAD]]
 
[[Category:Nano Electronic]]
 
 
STATUS
 
[[Category:Available]]
 
[[Category:In progress]]
 
 
[[Category:Completed]]
 
[[Category:Completed]]
[[Category:Research]]
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[[Category:Badawi]]
 
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[[Category:Telecommunications]]
TYPE OF WORK
 
[[Category:Semester Thesis]]
 
[[Category:Master Thesis]]
 
[[Category:PhD Thesis]]
 
 
 
NAMES OF EU/CTI/NT PROJECTS
 
[[Category:UltrasoundToGo]]
 
[[Category:IcySoC]]
 
[[Category:PSocrates]]
 
[[Category:UlpSoC]]
 
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Latest revision as of 13:07, 9 February 2015

Multiuser Equalization and Detection.jpg

Short Description

TD-SCDMA is a 3GPP standard that combines an advanced TDMA/TDD system with an adaptive CDMA component operating in a synchronous mode. Its TDD nature allows to master asymmetric services more efficiently than other 3G standards. Up- and downlink resources are flexibly assigned according to traffic needs, and a flexible data rate upto 2.8Mbit/s is provided. Which is helpful in an environment with increasing data traffic, which tends to be asymmetric (mobile Internet). In order to bring this to practice, clever Multiuser detection and equalization techniques have to be deployed at the UE. In this thesis, novel and well-known techniques shall be implemented and investigated with focus on their performance-complexity tradeoff and their performance limitations in realistic conditions. Therefore, Matlab blocks have to be implemented and integrated within our TD-SCDMA simulation chain, followed by implementation in VHDL code. Finally, the design has to be synthesized and optimized.

Status: Completed

For similar projects contact us!
Contact: Karim Badawi

Prerequisites

VLSI I
Interest in Mobile Communications
Matlab and VHDL knowledge

Professor

Qiuting Huang