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Channel Decoder in Today's Communication Systems

Short Description

Today, Turbo Decoder and LDPC Decoder are well established in the majority of communication systems. While the physical baseband computation in the cellular LTE standard for example bases on a Turbo codes, LDPC codes have been adopted in the Wifi standard IEEE802.11n/ac/ax. With that the question arises: What comes next?

There are various channel decoding algorithms which will potentially succeed Turbo and LDPC codes. Promising candidates are: Non-binary LDPC codes, Spatially-Coupled LDPC Codes, and Polar Codes. The goal of this project is to do a quantitative evaluation of the channel decoding candidates based on optimized VLSI implementations.

Your first task in this project will be to develop and optimize a decoder architecture for one of the channel decoder candidates.


is to upgrade the available Matlab-based LTE-simulation environment to support a standard Turbo equalization algorithm. In a next step this algorithm needs to be adapted towards the LTE Cat-M2 physical communication channels which support codeword repetitions. In the next phase an architectural concept for a hardware implementation will be developed that especially needs to consider the synchronization of the channel equalizer and the channel decoder. Finally, you will port the algorithm to an HDL implementation and synthesize it either towards an FPGA or an ASIC implementation in order to analyze the hardware complexity of the developed algorithm.

Status: Available

Looking for Interested Master Students (Semester Project / Master Thesis)
Contact: Matthias Korb

Prerequisites

VLSI I

Character

20% Theory, Algorithms, and Simulation
30% Architectural Design
50% HDL Implementation

Professor

Qiuting Huang

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