Difference between revisions of "Norbert Felber"
From iis-projects
(Created page with "==Interests== * Digital design, design flows, ASIC design * Full custom digital design, standard cells * Computer architecture, microprocessors * Cryptographic hardware * Asyn...") |
|||
Line 25: | Line 25: | ||
category = Felber | category = Felber | ||
</DynamicPageList> | </DynamicPageList> | ||
− | |||
==Contact Information== | ==Contact Information== | ||
* '''Office''': ETZ J85, | * '''Office''': ETZ J85, |
Latest revision as of 13:56, 18 February 2015
Contents
Interests
- Digital design, design flows, ASIC design
- Full custom digital design, standard cells
- Computer architecture, microprocessors
- Cryptographic hardware
- Asynchronous design, GALS
- Testing of Integrated Circuits
Available Projects
- Ultra-High-Efficiency Power Supply Management for Ultra-Low-Power Systems on Chip
- Audio DAC Conversion Jitter Measurement System
- Hybrid Analog/Digital Leveling Loop for Very-Low-Distortion Oscillator
Projects in Progress
No pages meet these criteria.
Completed Projects
- Efficient Digital Signal Processing in High-Channel-Count High-Frame-Rate 3D Ultrasound Imaging Systems
- Quantum Key Secured 100 Gbit/s Payload Encryption and its High-Speed Network Interfaces
Contact Information
- Office: ETZ J85,
- e-mail: felber@iis.ee.ethz.ch
- phone: (+41 44 63) 252 42
- www: http://www.iis.ee.ethz.ch/~felber