Personal tools

Difference between revisions of "PULP’s CLIC extensions for fast interrupt handling"

From iis-projects

Jump to: navigation, search
(Created page with "<!-- Integration and Implementation of Alibaba’s T-Head CLIC Interrupt Controller in PULP SoC --> Category:Digital Category:Computer Architecture Category:SW/HW P...")
 
Line 7: Line 7:
 
[[Category:Real-Time Embedded Systems]]
 
[[Category:Real-Time Embedded Systems]]
 
[[Category:2021]]
 
[[Category:2021]]
[[Category:Master Thesis]]
+
[[Category:Semester Thesis]]
 
[[Category:Balasr]]
 
[[Category:Balasr]]
 
[[Category:Available]]
 
[[Category:Available]]
Line 15: Line 15:
 
== Status: Available ==
 
== Status: Available ==
  
* Type: Master Thesis
+
* Type: Semester Thesis
 
* Professor: Prof. Dr. L. Benini
 
* Professor: Prof. Dr. L. Benini
 
* Supervisors:
 
* Supervisors:
Line 33: Line 33:
  
 
The goal of this project is to:
 
The goal of this project is to:
* Study the RISC-V CLIC specifications and T-Head’s CLIC source code.  
+
* Study the RISC-V CLIC specifications and T-Head’s CLIC source code. We at IIS we have forked T-Head's processors sourcecode to support our environment (Mentor Questa for RTL simulation and SW toolchain building) [3] to ease development/usage bring-up overhead.
* For the latter, at IIS we have forked T-Head’s processors in our environment (Mentor Questa for RTL simulation and SW toolchain building) [3] to ease development/usage bring-up overhead.
 
 
* Integrate T-Head’s CLIC into PULPissimo and couple it with CV32E40P
 
* Integrate T-Head’s CLIC into PULPissimo and couple it with CV32E40P
 
* Verify functional correctness in simulation and measure interrupt latency
 
* Verify functional correctness in simulation and measure interrupt latency
Line 51: Line 50:
 
* Experience with digital design in SystemVerilog as taught in VLSI I
 
* Experience with digital design in SystemVerilog as taught in VLSI I
 
* Must have visited VLSI II in a previous semester or take it alongside the thesis
 
* Must have visited VLSI II in a previous semester or take it alongside the thesis
 
  
  

Revision as of 16:11, 10 January 2022


Overview

Status: Available

Introduction

Alibaba has recently (October 2021) introduced a range of RISC-V processors with the Xuantie family ranging from the E902 micro-controller class core to the C910 core for servers in data centers. This also includes the XuanTie C906 core found in the Allwinner D1 single-core RISC-V processor. T-Head had open-sourced four RISC-V-based Xuantie series processor cores, namely Xuantie E902, E906, C906, and C910, as well as related software and tools [1]. Xuantie E902 and E906 processors implement the Core-Local Interrupt Controller (CLIC) [2], a newly proposed RISC-V interrupt controller promising low-latency, vectored, pre-emptive interrupts to meet the needs of Real-Time embedded systems.

Project

At IIS we recently developed an in-house CLIC IP, which is coupled with the CV32E40P processor [4] within the PULPissimo SoC platform. PULPissimo is a RISC-V microcontroller [5] developed by PULP.

The goal of this project is to:

  • Study the RISC-V CLIC specifications and T-Head’s CLIC source code. We at IIS we have forked T-Head's processors sourcecode to support our environment (Mentor Questa for RTL simulation and SW toolchain building) [3] to ease development/usage bring-up overhead.
  • Integrate T-Head’s CLIC into PULPissimo and couple it with CV32E40P
  • Verify functional correctness in simulation and measure interrupt latency
  • Synthesize and compare with PULP’s CLIC (area/timing reports)
  • ASIC Backend flow towards PULPissimo SoC tapeout


Character

  • 10% Literature / architecture review
  • 40% RTL implementation
  • 30% Backend
  • 20% Evaluation

Prerequisites

  • Experience with digital design in SystemVerilog as taught in VLSI I
  • Must have visited VLSI II in a previous semester or take it alongside the thesis


References

[1] https://github.com/T-head-Semi (GitHub repository)

[2] https://github.com/riscv/riscv-fast-interrupt/blob/master/clic.adoc (GitHub repository)

[3] https://github.com/bluewww/opene906 (GitHub repository)

[4] https://github.com/openhwgroup/cv32e40p (GitHub repository)

[5] https://github.com/pulp-platform/pulpissimo (GitHub repository)