Difference between revisions of "RazorEDGE: An Evolved EDGE DBB ASIC"
(Created page with "thumb|RazorEDGE ASIC with testbed. ===Date=== : 2013 ===Personnel=== : Harald Kroell : Stefan Zwicky : User:Webe...")
Revision as of 13:56, 17 April 2015
- Hasler Stiftung
The first complete Evolved EDGE transceiver physical layer ASIC supporting receive diversity and soft-output Viterbi equalization is presented. It comprises transmitter and receiver with detector and a decoder with an autonomous incremental redundancy implementation. The ASIC reaches a measured sensitivity of -111.8 dBm for single antenna GSM voice channels and achieves the reference interference performance for adjacent channels 12 dB above 3GPP requirements. It occupies 6 mm2 in 130 nm CMOS with a power consumption between 5 and 39 mW.
- Harald Kröll, Stefan Zwicky, Benjamin Weber, Christoph Roth, Christian Benkeser, Andreas Burg, Qiuting Huang. An Evolved EDGE PHY ASIC Supporting Soft-Output Equalization and Rx Diversity. In European Solid State Circuits Conference (ESSCIRC), ESSCIRC 2014 - 40th. pages 203-206. September 2014.