Difference between revisions of "SW/HW Predictability and Security"
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Revision as of 18:33, 16 November 2020
We are in the processes of creating a top-level information page, in the meantime please continue directly to the specific subsections below.
Contents
Predictable Execution
Please continue to Predictable_Execution if you are interested in timing predictable/safety critical embedded systems.
Cryptography
Please continue to Cryptography if you are interested in cryptographic hardware.
Projects
Available Projects
- Fast Accelerator Context Switch for PULP
- FPGA mapping of RPC DRAM
- Non-blocking Algorithms in Real-Time Operating Systems
- PULP Freertos with LLVM
- Resource Partitioning of RPC DRAM
Projects In Progress
Completed Projects
- Resource Partitioning of Caches
- Development of statistics and contention monitoring unit for PULP
- Peripheral Event Linking System for Real-time Capable Energy Efficient SoCs
- CLIC for the CVA6
- SCMI Support for Power Controller Subsystem
- PULP’s CLIC extensions for fast interrupt handling
- Hypervisor Extension for Ariane (M)
