Snitch meets iCE40 (1-2S/B)
The iCE40 FPGA series from Lattice Semiconductor is enjoying great popularity in the hardware community due to their multitude of advantages:
- extremely low power consumption
- flexible logic architecture with up to 7680 LUTs and powerful DSP slices
- simple footprint and only a minimal required supporting circuitry
- low price
- fully free and open-source tool flow (with yosys and project IceStorm)
At our Group we have developed a flexible SoC centred around a tiny RISC-V core called Snitch. So far we have only targeted Snitch SoCs to ASICs and large high-performance FPGAs. We would additionally like to explore how well systems based around Snitch map to the iCE40 family. During the project a multitude of design aspects can be explored:
- What is the largest amount of cores we can bring on an iCE40?
- What is the smallest iCE40 that can hold one Snitch core (and some memory to store a program)?
- How fast can we go? What is the fastest iCE40 FPGA?
- How much power does a Snitch system consume, what is the minimum power required, and can we compete with a microcontroller?
- And many more!
The project can be centred around some of the following sub tasks:
- Familiarize yourselves with the iCE40 Family, compile a tangible map showing the FPGAs with their strengths and weaknesses
- Familiarize yourselves with the Snitch system
- Implement some key modules of Snitch on the iCE40 family with IceStorm or the IDE provided by Lattice and evaluate utilization, speed, and power
- Explore extreme design points (largest system, smallest system, lowest power, fastest design, smallest footprint, …)
- Evaluate and implement design improvements to adapt the Snitch core and/or system to better fit the iCE40 family.
- Interest in computer architecture
- Experience with HDLs as taught in VLSI I
- Preferably: Previous experience with FPGAs
- 50% exploration
- 30% evaluation
- 20% implementation