User contributions
From iis-projects
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- 10:14, 12 May 2023 (diff | hist) . . (+6,257) . . N A reduction-capable AXI XBAR for fast M-to-1 communication (1M) (Created page with "<!-- A reduction-capable AXI XBAR for fast M-to-1 communication (1M) --> Category:Digital Category:High Performance SoCs Category:2023 Category:Master Thesis...")
- 14:56, 11 May 2023 (diff | hist) . . (+101) . . Benchmarking a heterogeneous 217-core MPSoC on HPC applications (M/1-3S)
- 13:19, 20 January 2023 (diff | hist) . . (+99) . . Benchmarking a heterogeneous 217-core MPSoC on HPC applications (M/1-3S)
- 22:29, 19 January 2023 (diff | hist) . . (0) . . Accelerating Stencil Workloads on Snitch using ISSRs (1-2S/B) (current)
- 22:28, 19 January 2023 (diff | hist) . . (0) . . Benchmarking a heterogeneous 217-core MPSoC on HPC applications (M/1-3S)
- 22:28, 19 January 2023 (diff | hist) . . (0) . . GDBTrace: A Post-Simulation Trace-Based RISC-V GDB Debugging Server (1S)
- 13:03, 13 January 2023 (diff | hist) . . (+95) . . Benchmarking a heterogeneous 217-core MPSoC on HPC applications (M/1-3S) (→Status: Available)
- 15:14, 22 November 2022 (diff | hist) . . (0) . . Benchmarking a heterogeneous 217-core MPSoC on HPC applications (M/1-3S)
- 15:12, 22 November 2022 (diff | hist) . . (+1,058) . . Benchmarking a heterogeneous 217-core MPSoC on HPC applications (M/1-3S)
- 12:25, 27 October 2022 (diff | hist) . . (+3) . . High Performance SoCs (→Who are we)
- 12:24, 27 October 2022 (diff | hist) . . (+218) . . High Performance SoCs
- 12:09, 26 October 2022 (diff | hist) . . (+4) . . Benchmarking a heterogeneous 217-core MPSoC on HPC applications (M/1-3S) (→Optional stretch goals)
- 12:08, 26 October 2022 (diff | hist) . . (+13) . . Benchmarking a heterogeneous 217-core MPSoC on HPC applications (M/1-3S) (→Detailed task description)
- 14:13, 13 October 2022 (diff | hist) . . (0) . . GDBTrace: A Post-Simulation Trace-Based RISC-V GDB Debugging Server (1S)
- 14:13, 13 October 2022 (diff | hist) . . (0) . . N File:Gdb logo.png (current)
- 14:12, 13 October 2022 (diff | hist) . . (+52) . . GDBTrace: A Post-Simulation Trace-Based RISC-V GDB Debugging Server (1S)
- 14:08, 13 October 2022 (diff | hist) . . (-20) . . User:Colluca (→Available Projects)
- 14:08, 13 October 2022 (diff | hist) . . (-20) . . User:Colluca (→Completed Projects)
- 14:07, 13 October 2022 (diff | hist) . . (-20) . . User:Colluca (→Projects In Progress)
- 13:40, 13 October 2022 (diff | hist) . . (+36) . . GDBTrace: A Post-Simulation Trace-Based RISC-V GDB Debugging Server (1S)
- 13:33, 13 October 2022 (diff | hist) . . (+5) . . GDBTrace: A Post-Simulation Trace-Based RISC-V GDB Debugging Server (1S) (→Your learnings)
- 13:32, 13 October 2022 (diff | hist) . . (+6) . . User:Colluca
- 11:39, 13 October 2022 (diff | hist) . . (+56) . . GDBTrace: A Post-Simulation Trace-Based RISC-V GDB Debugging Server (1S) (→Project description)
- 11:38, 13 October 2022 (diff | hist) . . (-10) . . GDBTrace: A Post-Simulation Trace-Based RISC-V GDB Debugging Server (1S) (→Project description)
- 11:38, 13 October 2022 (diff | hist) . . (+18) . . GDBTrace: A Post-Simulation Trace-Based RISC-V GDB Debugging Server (1S) (→Project description)
- 11:36, 13 October 2022 (diff | hist) . . (+76) . . GDBTrace: A Post-Simulation Trace-Based RISC-V GDB Debugging Server (1S)
- 11:36, 13 October 2022 (diff | hist) . . (+192) . . GDBTrace: A Post-Simulation Trace-Based RISC-V GDB Debugging Server (1S) (→Project description)
- 11:33, 13 October 2022 (diff | hist) . . (-2) . . GDBTrace: A Post-Simulation Trace-Based RISC-V GDB Debugging Server (1S) (→Prerequisites)
- 11:32, 13 October 2022 (diff | hist) . . (+2) . . GDBTrace: A Post-Simulation Trace-Based RISC-V GDB Debugging Server (1S) (→Prerequisites)
- 11:32, 13 October 2022 (diff | hist) . . (+92) . . GDBTrace: A Post-Simulation Trace-Based RISC-V GDB Debugging Server (1S) (→Prerequisites)
- 11:30, 13 October 2022 (diff | hist) . . (+151) . . GDBTrace: A Post-Simulation Trace-Based RISC-V GDB Debugging Server (1S) (→Your learnings)
- 11:23, 13 October 2022 (diff | hist) . . (+3) . . GDBTrace: A Post-Simulation Trace-Based RISC-V GDB Debugging Server (1S) (→Optional stretch goals)
- 11:23, 13 October 2022 (diff | hist) . . (+6) . . GDBTrace: A Post-Simulation Trace-Based RISC-V GDB Debugging Server (1S) (→Your learnings)
- 11:22, 13 October 2022 (diff | hist) . . (+58) . . GDBTrace: A Post-Simulation Trace-Based RISC-V GDB Debugging Server (1S) (→Your learnings)
- 11:19, 13 October 2022 (diff | hist) . . (+912) . . GDBTrace: A Post-Simulation Trace-Based RISC-V GDB Debugging Server (1S) (→Project description)
- 10:56, 13 October 2022 (diff | hist) . . (+54) . . GDBTrace: A Post-Simulation Trace-Based RISC-V GDB Debugging Server (1S) (→Project description)
- 10:53, 13 October 2022 (diff | hist) . . (-18) . . GDBTrace: A Post-Simulation Trace-Based RISC-V GDB Debugging Server (1S) (→Introduction)
- 10:51, 13 October 2022 (diff | hist) . . (-9) . . GDBTrace: A Post-Simulation Trace-Based RISC-V GDB Debugging Server (1S) (→Introduction)
- 10:51, 13 October 2022 (diff | hist) . . (-7) . . GDBTrace: A Post-Simulation Trace-Based RISC-V GDB Debugging Server (1S) (→Introduction)
- 10:51, 13 October 2022 (diff | hist) . . (+7) . . GDBTrace: A Post-Simulation Trace-Based RISC-V GDB Debugging Server (1S) (→Introduction)
- 10:50, 13 October 2022 (diff | hist) . . (0) . . GDBTrace: A Post-Simulation Trace-Based RISC-V GDB Debugging Server (1S) (→Introduction)
- 10:49, 13 October 2022 (diff | hist) . . (+1) . . GDBTrace: A Post-Simulation Trace-Based RISC-V GDB Debugging Server (1S) (→Introduction)
- 01:02, 13 October 2022 (diff | hist) . . (-86) . . A Post-Simulation Trace-Based RISC-V GDB Debugging Server (Blanked the page) (current)
- 01:01, 13 October 2022 (diff | hist) . . (+86) . . N A Post-Simulation Trace-Based RISC-V GDB Debugging Server (Colluca moved page A Post-Simulation Trace-Based RISC-V GDB Debugging Server to GDBTrace: A Post-Simulation Trace-Based RISC-V GDB Debugging Server (1S))
- 01:01, 13 October 2022 (diff | hist) . . (0) . . m GDBTrace: A Post-Simulation Trace-Based RISC-V GDB Debugging Server (1S) (Colluca moved page A Post-Simulation Trace-Based RISC-V GDB Debugging Server to GDBTrace: A Post-Simulation Trace-Based RISC-V GDB Debugging Server (1S))
- 01:01, 13 October 2022 (diff | hist) . . (+1) . . GDBTrace: A Post-Simulation Trace-Based RISC-V GDB Debugging Server (1S) (→Project description)
- 00:59, 13 October 2022 (diff | hist) . . (+205) . . GDBTrace: A Post-Simulation Trace-Based RISC-V GDB Debugging Server (1S)
- 00:53, 13 October 2022 (diff | hist) . . (-189) . . GDBTrace: A Post-Simulation Trace-Based RISC-V GDB Debugging Server (1S)
- 23:47, 12 October 2022 (diff | hist) . . (+335) . . GDBTrace: A Post-Simulation Trace-Based RISC-V GDB Debugging Server (1S)
- 23:20, 12 October 2022 (diff | hist) . . (+5,783) . . N GDBTrace: A Post-Simulation Trace-Based RISC-V GDB Debugging Server (1S) (Created page with "<!-- A Post-Simulation Trace-Based RISC-V GDB Debugging Server (1S) --> Category:Digital Category:High Performance SoCs Category:2022 Category:Semester Thesis...")
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