User contributions
From iis-projects
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- 11:02, 8 July 2022 (diff | hist) . . (-17) . . Spatz grows wings: Physical Implementation of a Vector-Powered Manycore System (2S) (current)
- 10:11, 30 June 2022 (diff | hist) . . (+7,944) . . N Spatz grows wings: Physical Implementation of a Vector-Powered Manycore System (2S) (Created page with "= Overview = == Status: Available == * Type: Semester Thesis * Professor: Prof. Dr. L. Benini * Supervisors: ** Matheus Cavalcante: [mailto:matheusd@iis...")
- 10:00, 30 June 2022 (diff | hist) . . (-2) . . Implementation of a Small and Energy-Efficient RISC-V-based Vector Accelerator (1M) (current)
- 09:36, 22 October 2021 (diff | hist) . . (+2) . . Implementation of a Small and Energy-Efficient RISC-V-based Vector Accelerator (1M)
- 12:54, 4 August 2021 (diff | hist) . . (+1,455) . . Implementation of a Small and Energy-Efficient RISC-V-based Vector Accelerator (1M)
- 12:49, 4 August 2021 (diff | hist) . . (+8,441) . . Implementation of a Small and Energy-Efficient RISC-V-based Vector Accelerator (1M)
- 12:45, 4 August 2021 (diff | hist) . . (+875) . . N Implementation of a Small and Energy-Efficient RISC-V-based Vector Accelerator (1M) (Created page with "<!-- Implementation of a Small and Energy-Efficient RISC-V-based Vector Accelerator (1M) --> = Overview = == Status: Available == * Type: Master's Thesis * Professor: Prof....")
- 13:53, 17 March 2021 (diff | hist) . . (+28) . . Manycore System on FPGA (M/S/G)
- 13:52, 17 March 2021 (diff | hist) . . (+27) . . Physical Implementation of Ara, PULP's Vector Machine (1-2S)
- 13:46, 15 February 2021 (diff | hist) . . (-3) . . Physical Implementation of Ara, PULP's Vector Machine (1-2S) (→Project Description)
- 13:45, 15 February 2021 (diff | hist) . . (-13) . . Physical Implementation of Ara, PULP's Vector Machine (1-2S)
- 13:47, 1 February 2021 (diff | hist) . . (-59) . . Physical Implementation of Ara, PULP's Vector Machine (1-2S)
- 13:40, 1 February 2021 (diff | hist) . . (+23) . . Physical Implementation of Ara, PULP's Vector Machine (1-2S)
- 12:30, 1 February 2021 (diff | hist) . . (-10) . . Physical Implementation of Ara, PULP's Vector Machine (1-2S)
- 12:29, 1 February 2021 (diff | hist) . . (+248) . . Physical Implementation of Ara, PULP's Vector Machine (1-2S)
- 12:28, 1 February 2021 (diff | hist) . . (+540) . . Physical Implementation of Ara, PULP's Vector Machine (1-2S)
- 10:53, 1 February 2021 (diff | hist) . . (+924) . . Physical Implementation of Ara, PULP's Vector Machine (1-2S)
- 17:38, 31 January 2021 (diff | hist) . . (+4,440) . . N Physical Implementation of Ara, PULP's Vector Machine (1-2S) (Created page with "= Overview = == Status: Available == * Type: Semester Thesis * Professor: Prof. Dr. L. Benini * Supervisors: ** Matheus Cavalcante: [mailto:matheusd@iis...")
- 15:54, 25 January 2021 (diff | hist) . . (-113) . . Physical Implementation of MemPool, PULP's Manycore System (1M/1-2S)
- 11:51, 20 January 2021 (diff | hist) . . (+18) . . Physical Implementation of MemPool, PULP's Manycore System (1M/1-2S)
- 18:33, 8 December 2020 (diff | hist) . . (+890) . . N Matheus Cavalcante (Created page with "== Matheus Cavalcante == thumb|200px| * '''e-mail''': [mailto:matheusd@iis.ee.ethz.ch matheusd@iis.ee.ethz.ch] Category:Digital I receiv...") (current)
- 20:11, 2 November 2020 (diff | hist) . . (0) . . m User:Mmaxim (Matheusd moved page Mmaxim to User:Mmaxim) (current)
- 20:11, 2 November 2020 (diff | hist) . . (+25) . . N Mmaxim (Matheusd moved page Mmaxim to User:Mmaxim) (current)
- 17:40, 2 November 2020 (diff | hist) . . (0) . . m Physical Implementation of MemPool, PULP's Manycore System (1M/1-2S) (Matheusd moved page Physical Implementation of MemPool, PULP's Manycore System to Physical Implementation of MemPool, PULP's Manycore System (1M/1-2S))
- 17:40, 2 November 2020 (diff | hist) . . (+82) . . N Physical Implementation of MemPool, PULP's Manycore System (Matheusd moved page Physical Implementation of MemPool, PULP's Manycore System to Physical Implementation of MemPool, PULP's Manycore System (1M/1-2S)) (current)
- 17:40, 2 November 2020 (diff | hist) . . (+130) . . Physical Implementation of MemPool, PULP's Manycore System (1M/1-2S) (→Status: Available)
- 17:39, 2 November 2020 (diff | hist) . . (-1) . . Physical Implementation of MemPool, PULP's Manycore System (1M/1-2S) (→Meetings =)
- 17:39, 2 November 2020 (diff | hist) . . (+3) . . Physical Implementation of MemPool, PULP's Manycore System (1M/1-2S) (→Project Realization)
- 17:38, 2 November 2020 (diff | hist) . . (-4) . . Physical Implementation of MemPool, PULP's Manycore System (1M/1-2S)
- 17:38, 2 November 2020 (diff | hist) . . (+7,641) . . N Physical Implementation of MemPool, PULP's Manycore System (1M/1-2S) (Created page with "== Introduction == In a quest for high-performance computing systems, few architectural models retain the flexibility of many-core systems. Those systems integrate a very la...")
- 17:26, 2 November 2020 (diff | hist) . . (-35) . . Implementation of a Heterogeneous System for Image Processing on an FPGA (S) (current)
- 17:26, 2 November 2020 (diff | hist) . . (0) . . m Implementation of a Heterogeneous System for Image Processing on an FPGA (S) (Matheusd moved page Implementation of a Heterogeneous System for Image Processing on an FPGA (M) to Implementation of a Heterogeneous System for Image Processing on an FPGA (S))
- 17:26, 2 November 2020 (diff | hist) . . (+90) . . N Implementation of a Heterogeneous System for Image Processing on an FPGA (M) (Matheusd moved page Implementation of a Heterogeneous System for Image Processing on an FPGA (M) to Implementation of a Heterogeneous System for Image Processing on an FPGA (S)) (current)
- 14:16, 2 November 2020 (diff | hist) . . (+3) . . User:Matheusd (current)
- 12:18, 2 November 2020 (diff | hist) . . (-4) . . Implementation of a Heterogeneous System for Image Processing on an FPGA
- 12:17, 2 November 2020 (diff | hist) . . (+35) . . Implementation of a Heterogeneous System for Image Processing on an FPGA
- 14:48, 29 October 2020 (diff | hist) . . (+86) . . High Performance SoCs (→Who are we)
- 14:47, 29 October 2020 (diff | hist) . . (+1) . . User:Matheusd
- 14:46, 29 October 2020 (diff | hist) . . (0) . . N File:Matheusd face 1to1.png (current)
- 14:46, 29 October 2020 (diff | hist) . . (+290) . . User:Matheusd
- 14:43, 29 October 2020 (diff | hist) . . (-4) . . User:Matheusd (→Available Projects)
- 14:42, 29 October 2020 (diff | hist) . . (+232) . . User:Matheusd
- 14:42, 29 October 2020 (diff | hist) . . (+23) . . Ara: Update PULP's Vector Processor with the recent RISC-V Vector Extension Development (current)
- 14:41, 29 October 2020 (diff | hist) . . (-23) . . Ara: Update PULP's Vector Processor with the recent RISC-V Vector Extension Development
- 14:40, 29 October 2020 (diff | hist) . . (-10) . . High Performance SoCs (→Matheus De Araujo Cavalcante)
- 18:46, 21 February 2020 (diff | hist) . . (-7) . . Implementation of a Heterogeneous System for Image Processing on an FPGA
- 20:31, 26 January 2020 (diff | hist) . . (+4,285) . . N Ara: Update PULP's Vector Processor with the recent RISC-V Vector Extension Development (Created page with "== Introduction == In instruction-based programmable architectures, the key challenge is how to mitigate the Von Neumann Bottleneck (VNB). This is related with the memory tra...")
- 14:22, 10 January 2020 (diff | hist) . . (+10) . . Implementation of a Heterogeneous System for Image Processing on an FPGA
- 13:42, 10 January 2020 (diff | hist) . . (+5,058) . . N Implementation of a Heterogeneous System for Image Processing on an FPGA (Created page with "== Introduction == Heterogeneous systems combine a general-purpose host processor with domain-specific Programmable Many-Core Accelerators (PMCAs). Such systems are highly ve...")
- 13:41, 10 January 2020 (diff | hist) . . (0) . . N File:HalideLang.png (current)
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