Dead-end pages

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Showing below up to 50 results in range #51 to #100.

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51. Embedded Artificial Intelligence:Systems And Applications
52. Embedded Systems and autonomous UAVs
53. Enabling Standalone Operation
54. Every individual on the planet should have a real chance to obtain personalized medical therapy
55. Experimental Validation of Impact Ionization Models for TCAD Simulation by a Novel Characterization Technique
56. FFT HDL Code Generator for Multi-Antenna mmWave Communication
57. FPGA-Based Digital Frontend for 3G Receivers
58. FPGA Optimizations of Dense Binary Hyperdimensional Computing
59. Fabian Schuiki
60. Fast and Accurate Multiclass Inference for Brain–Computer Interfaces
61. Federico Villani
62. Ferroelectric Memristors for Artificial Neural Networks (IBM-Zurich)
63. Final Presentation
64. Final Report
65. Frank K. Gürkaynak
66. GRAND Hardware Implementation
67. Guillaume Mocquard
68. Harald Kröll
69. Hardware Accelerated Derivative Pricing
70. Herschmi
71. High resolution, low power Sigma Delta ADC
72. Hyperdimensional Computing
73. IBM A2O Core
74. IBM Research–Zurich
75. IP-Based SoC Generation and Configuration (1-3S)
76. ISA extensions in the Snitch Processor for Signal Processing (1M)
77. IcySoC
78. Implementation of Computationally Efficient Scattering Mechanisms for Periodic Devices and 2D Materials
79. Implementation of a Heterogeneous System for Image Processing on an FPGA
80. Influence of the Initial Filament Geometry on the Forming Step in CBRAM
81. Influence of the Initial Filament Geometry on the Forming Step in CBRAM.
82. Integrated Devices, Electronics, And Systems
83. Integrated silicon photonic structures
84. Integrated silicon photonic structures-Lumiphase
85. Integrating Hardware Accelerators into Snitch
86. Investigation of Metal Diffusion in Oxides for CBRAM Applications
87. Investigation of Redox Processes in CBRAM
88. Jammer-Resilient Synchronization for Wireless Communications
89. Jammer Mitigation Meets Machine Learning
90. Karim Badawi
91. Libria
92. LightProbe
93. Low-Power Time Synchronization for IoT Applications
94. Low Power Embedded Systems
95. Low Power Embedded Systems and Wireless Sensors Networks
96. Machine Learning Assisted Direct Synthesis of Passive Networks
97. Mapping Networks on Reconfigurable Binary Engine Accelerator
98. Marco Bertuletti
99. Matheus Cavalcante
100. Matteo Perotti

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