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  1. (M): A Flexible Peripheral System for High-Performance Systems on Chip
  2. 3D Ultrasound Bubble Tracking
  3. 4th Generation Synchronization
  4. 5G Cellular RF Front-end Design in 22nm CMOS Technology
  5. AMZ Driverless Competition Embedded Systems Projects
  6. ASIC Design of a Gaussian Message Passing Processor
  7. ASIC Design of a Sigma Point Processor
  8. ASIC Development of 5G-NR LDPC Decoder
  9. ASIC Implementation of Jammer Mitigation
  10. ASIC Implementation of a Low-Power mmWave Massive MIMO Equalizer with a Custom Number Format
  11. A Demonstrator of Non-Synchronized Hyperdimensional Body Area Networks
  12. A Flexible FPGA-Based Peripheral Platform Extending Linux-Capable Systems on Chip (1-3S/B)
  13. A Flexible Peripheral System for High-Performance Systems on Chip (M)
  14. A Multiview Synthesis Core in 65 nm CMOS
  15. A Novel Constrained-Viterbi Algorithm with Linear Equalization and Grouping Assistance
  16. A Novel Execution Scheme for Ultra-tiny CNNs Aboard Nano-UAVs
  17. A Snitch-based Compute Accelerator for HERO
  18. A Trustworthy Three-Factor Authentication System
  19. A Unified-Multiplier Based Hardware Architecture for Elliptic Curve Cryptography
  20. A Unified Compute Kernel Library for Snitch (1-2S)
  21. A Waypoint-based Navigation System for Nano-Size UAVs in GPS-denied Environments
  22. A Wearable System To Control Phone And Electronic Device Without Hands
  23. A Wearable System for long term monitoring of human physiological parameters with E skin sensors
  24. A Wearable Wireless Kidney Function Monitoring System For BioMedical Applications
  25. A Wireless Sensor Network for HPC monitoring
  26. A Wireless Sensor Network for a Smart Building Monitor and Control
  27. A computational memory unit using phase-change memory devices
  28. A mmWave Voltage-Controlled-Oscillator (VCO) for beyond 5G applications
  29. Ab-initio Simulation of Strained Thermoelectric Materials
  30. Accelerating Applications Relying on Matrix-Vector-Product-Like Operations
  31. Accelerating Stencil Workloads on Snitch using ISSRs (1-2S/B)
  32. Accelerators for object detection and tracking
  33. Accurate deep learning inference using computational memory
  34. Active-Set QP Solver on FPGA
  35. Advanced 5G Repetition Combining
  36. Adversarial Attacks Against Deep Neural Networks In Wearable Cameras
  37. Aliasing-Free Wavetable Music Synthesizer
  38. Ambient RF Energy harvesting for Wireless Sensor Network
  39. An Efficient Compiler Backend for Snitch (1S/B)
  40. An Energy Efficient Brain-Computer Interface using Mr.Wolf
  41. An FPGA-Based Evaluation Platform for Mobile Communications
  42. An FPGA-Based Testbed for 3G Mobile Communications Receivers
  43. An Industrial-grade Bluetooth LE Mesh Network Solution
  44. An RPC DRAM Implementation for Energy-Efficient ASICs (1-2S)
  45. An all Standard-Cell Based Energy Efficient HW Accelerator for DSP and Deep Learning Applications
  46. AnalogInt
  47. Analog Compute-in-Memory Accelerator Interface and Integration
  48. Analog Layout Engine
  49. Analog building blocks for mmWave manipulation
  50. Analysis of Low-Power Wide Area Network Technologies for the Internet of Things

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