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Showing below up to 250 results in range #1 to #250.

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1. (hist) ‎Deep Learning Projects ‎[18,260 bytes]
2. (hist) ‎Human Intranet ‎[17,908 bytes]
3. (hist) ‎Cycle-Accurate Event-Based Simulation of Snitch Core ‎[14,727 bytes]
4. (hist) ‎Energy Efficient Autonomous UAVs ‎[14,635 bytes]
5. (hist) ‎Feature Extraction and Architecture Clustering for Keyword Spotting (1S) ‎[13,131 bytes]
6. (hist) ‎Transforming MemPool into a CGRA (M) ‎[13,059 bytes]
7. (hist) ‎Resource-Constrained Few-Shot Learning for Keyword Spotting (1S) ‎[12,726 bytes]
8. (hist) ‎Efficient Synchronization of Manycore Systems (M/1S) ‎[12,563 bytes]
9. (hist) ‎Feature Extraction for Speech Recognition (1S) ‎[11,915 bytes]
10. (hist) ‎A Flexible Peripheral System for High-Performance Systems on Chip (M) ‎[11,717 bytes]
11. (hist) ‎A Snitch-based Compute Accelerator for HERO (M/1-2S) ‎[11,101 bytes]
12. (hist) ‎LLVM and DaCe for Snitch (1-2S) ‎[11,092 bytes]
13. (hist) ‎Audio Visual Speech Separation and Recognition (1S/1M) ‎[11,029 bytes]
14. (hist) ‎Bringup and Evaluation of an Energy-efficient Heterogeneous Manycore Compute Platform (1-2S) ‎[11,007 bytes]
15. (hist) ‎Online Learning of User Features (1S) ‎[10,895 bytes]
16. (hist) ‎High Performance SoCs ‎[10,887 bytes]
17. (hist) ‎On-Device Learnable Embeddings for Acoustic Environments ‎[10,834 bytes]
18. (hist) ‎Implementation of a Small and Energy-Efficient RISC-V-based Vector Accelerator (1M) ‎[10,771 bytes]
19. (hist) ‎Ottocore: A Minimal RISC-V Core Designed for Teaching (B/2G) ‎[10,534 bytes]
20. (hist) ‎PULP ‎[10,511 bytes]
21. (hist) ‎Ultra-low power processor design ‎[10,511 bytes]
22. (hist) ‎ASR-Waveformer ‎[10,179 bytes]
23. (hist) ‎Implementing DSP Instructions in Banshee (1S) ‎[10,092 bytes]
24. (hist) ‎On-Device Federated Continual Learning on Nano-Drone Swarms ‎[10,073 bytes]
25. (hist) ‎Hyperdimensional Computing ‎[9,993 bytes]
26. (hist) ‎Graph neural networks for epileptic seizure detection ‎[9,773 bytes]
27. (hist) ‎Fast Simulation of Manycore Systems (1S) ‎[9,741 bytes]
28. (hist) ‎Bringing XNOR-nets (ConvNets) to Silicon ‎[9,740 bytes]
29. (hist) ‎Biomedical Circuits, Systems, and Applications ‎[9,550 bytes]
30. (hist) ‎IBM Research ‎[9,475 bytes]
31. (hist) ‎Audio Visual Speech Recognition (1S/1M) ‎[9,414 bytes]
32. (hist) ‎Audio Visual Speech Separation (1S/1M) ‎[9,412 bytes]
33. (hist) ‎ISA extensions in the Snitch Processor for Signal Processing (M) ‎[9,151 bytes]
34. (hist) ‎Interfacing PULP with a Brain-Inspired Ultra-Low Power Spiking Cochlea ‎[9,139 bytes]
35. (hist) ‎Design and Implementation of a Convolutional Neural Network Accelerator ASIC ‎[9,080 bytes]
36. (hist) ‎On - Device Continual Learning for Seizure Detection on GAP9 ‎[9,053 bytes]
37. (hist) ‎Rethinking our Convolutional Network Accelerator Architecture ‎[9,007 bytes]
38. (hist) ‎Extreme-Edge Experience Replay for Keyword Spotting ‎[8,980 bytes]
39. (hist) ‎Heroino: Design of the next CORE-V Microcontroller ‎[8,937 bytes]
40. (hist) ‎Manycore System on FPGA (M/S/G) ‎[8,654 bytes]
41. (hist) ‎Continual Learning for Adaptive EEG Monitoring in Epileptic Seizure Detection ‎[8,413 bytes]
42. (hist) ‎MCU Bus and Memory Generator: implementation of a Highly Configurable bus and memory subsystem for a RISC-V based microcontroller. ‎[8,411 bytes]
43. (hist) ‎A Snitch-Based SoC on iCE40 FPGAs (1-2S/B) ‎[8,380 bytes]
44. (hist) ‎An RPC DRAM Implementation for Energy-Efficient ASICs (1-2S) ‎[8,317 bytes]
45. (hist) ‎High-speed Scene Labeling on FPGA ‎[8,302 bytes]
46. (hist) ‎Design of Scalable Event-driven Neural-Recording Digital Interface ‎[8,231 bytes]
47. (hist) ‎A reduction-capable AXI XBAR for fast M-to-1 communication (1M) ‎[8,184 bytes]
48. (hist) ‎FFT-based Convolutional Network Accelerator ‎[8,120 bytes]
49. (hist) ‎Improved State Estimation on PULP-based Nano-UAVs ‎[8,098 bytes]
50. (hist) ‎Improving our Smart Camera System ‎[8,056 bytes]
51. (hist) ‎Peripheral Event Linking System for Real-time Capable Energy Efficient SoCs ‎[8,002 bytes]
52. (hist) ‎Practical Reconfigurable Intelligent Surfaces (RIS) ‎[7,979 bytes]
53. (hist) ‎Floating-Point Divide & Square Root Unit for Transprecision ‎[7,966 bytes]
54. (hist) ‎Spatz grows wings: Physical Implementation of a Vector-Powered Manycore System (2S) ‎[7,927 bytes]
55. (hist) ‎RISC-V based Implementation of Secure Ranging According to IEEE 802.15.4z UWB ‎[7,824 bytes]
56. (hist) ‎GDBTrace: A Post-Simulation Trace-Based RISC-V GDB Debugging Server (1S) ‎[7,808 bytes]
57. (hist) ‎Mixed-Precision Neural Networks for Brain-Computer Interface Applications ‎[7,773 bytes]
58. (hist) ‎Physical Implementation of MemPool, PULP's Manycore System (1M/1-2S) ‎[7,696 bytes]
59. (hist) ‎Self-Supervised User Positioning in Cell-Free Massive MIMO Systems ‎[7,691 bytes]
60. (hist) ‎Towards the Ariane Desktop: Display Output for Ariane on FPGA under Linux (S/B/G) ‎[7,663 bytes]
61. (hist) ‎A RISC-V ISA Extension for Scalar Chaining in Snitch (M) ‎[7,624 bytes]
62. (hist) ‎XNORLAX: Fused XNOR-LATCH Custom-Standard-Cell-Based Processing-in-Memory ‎[7,358 bytes]
63. (hist) ‎Neural Network Algorithms and Interfaces with Accelerators for Embedded Platforms with Real World Applications ‎[7,337 bytes]
64. (hist) ‎Smart Patch For Heath Care And Rehabilitation ‎[7,308 bytes]
65. (hist) ‎Cell-Free mmWave Massive MIMO Communication ‎[7,265 bytes]
66. (hist) ‎Weekly Reports ‎[7,258 bytes]
67. (hist) ‎An all Standard-Cell Based Energy Efficient HW Accelerator for DSP and Deep Learning Applications ‎[7,241 bytes]
68. (hist) ‎Integrating Ultrasound Technology into a Fitness Tracking Device (1M, 2 B/S) ‎[7,201 bytes]
69. (hist) ‎A RISC-V ISA Extension for Pseudo Dual-Issue Monte Carlo in Snitch (1M/2S) ‎[7,168 bytes]
70. (hist) ‎Baseband Meets CPU ‎[7,100 bytes]
71. (hist) ‎Towards Autonomous Navigation for Nano-Blimps ‎[7,095 bytes]
72. (hist) ‎Embedded Audio Source Localization Exploiting Coincidence Detection in Asynchronous Spike Streams ‎[7,095 bytes]
73. (hist) ‎Benchmarking a heterogeneous 217-core MPSoC on HPC applications (M/1-3S) ‎[7,075 bytes]
74. (hist) ‎Integrated Information Processing ‎[7,051 bytes]
75. (hist) ‎Variable Bit Precision Logic for Deep Learning and Artificial Intelligence ‎[6,993 bytes]
76. (hist) ‎Semi-Custom Digital VLSI for Processing-in-Memory ‎[6,973 bytes]
77. (hist) ‎Digital ‎[6,954 bytes]
78. (hist) ‎Hardware Acceleration ‎[6,884 bytes]
79. (hist) ‎Bridging QuantLab with LPDNN ‎[6,871 bytes]
80. (hist) ‎Evaluating memory access pattern specializations in OoO, server-grade cores (M) ‎[6,859 bytes]
81. (hist) ‎ASIC implementation of a beamspace massive MIMO-OFDM detector for 5G/6G ‎[6,834 bytes]
82. (hist) ‎Scalable Heterogeneous L1 Memory Interconnect for Smart Accelerator Coupling in Ultra-Low Power Multicores ‎[6,805 bytes]
83. (hist) ‎On-Device Training Sparse Sub-Tensor Update Scheme Optimization for CNN-based tasks (SA or MA) ‎[6,772 bytes]
84. (hist) ‎Single-Bit-Synapse Spiking Neural System-on-Chip ‎[6,767 bytes]
85. (hist) ‎Accelerating Applications Relying on Matrix-Vector-Product-Like Operations ‎[6,754 bytes]
86. (hist) ‎Learning at the Edge with Hardware-Aware Algorithms ‎[6,742 bytes]
87. (hist) ‎Cerebellum: Design of a Programmable Smart-Peripheral for the Ariane Core ‎[6,724 bytes]
88. (hist) ‎Pretraining Foundational Models for EEG Signal Analysis Using Open Source Large Scale Datasets ‎[6,711 bytes]
89. (hist) ‎Low Power Neural Network For Multi Sensors Wearable Devices ‎[6,700 bytes]
90. (hist) ‎Multisensory system for performance analysis in ski jumping (M/1-2S/B) ‎[6,642 bytes]
91. (hist) ‎Exploring NAS spaces with C-BRED ‎[6,633 bytes]
92. (hist) ‎PULP in space - Fault Tolerant PULP System for Critical Space Applications ‎[6,628 bytes]
93. (hist) ‎Hardware Accelerators for Lossless Quantized Deep Neural Networks ‎[6,626 bytes]
94. (hist) ‎Improving Scene Labeling with Hyperspectral Data ‎[6,596 bytes]
95. (hist) ‎Low-Energy Cluster-Coupled Vector Coprocessor for Special-Purpose PULP Acceleration ‎[6,550 bytes]
96. (hist) ‎Low-Resolution 5G Beamforming Codebook Design ‎[6,549 bytes]
97. (hist) ‎Accelerating Matrix Multiplication on a 216-core MPSoC (1M) ‎[6,535 bytes]
98. (hist) ‎Timing Channel Mitigations for RISC-V Cores ‎[6,515 bytes]
99. (hist) ‎Serverless Benchmarks on RISC-V (M) ‎[6,436 bytes]
100. (hist) ‎Investigation of Quantization Strategies for Retentive Networks (1S) ‎[6,431 bytes]
101. (hist) ‎Efficient collective communications in FlooNoC (1M) ‎[6,417 bytes]
102. (hist) ‎Towards Self-Sustainable Unmanned Aerial Vehicles ‎[6,408 bytes]
103. (hist) ‎Digital Medical Ultrasound Imaging ‎[6,404 bytes]
104. (hist) ‎PULPonFPGA: Lightweight Virtual Memory Support - Physically Contiguous Memory ‎[6,362 bytes]
105. (hist) ‎AMZ Driverless Competition Embedded Systems Projects ‎[6,350 bytes]
106. (hist) ‎PULP-Shield for Autonomous UAV ‎[6,268 bytes]
107. (hist) ‎A Wearable Wireless Kidney Function Monitoring System For BioMedical Applications ‎[6,249 bytes]
108. (hist) ‎Exploratory Development of a Unified Foundational Model for Multi Biosignal Analysis ‎[6,238 bytes]
109. (hist) ‎Vector-based Manycore HPC Cluster Exploration for 5G Communication Algorithm (1-2M) ‎[6,238 bytes]
110. (hist) ‎Smart Virtual Memory Sharing ‎[6,235 bytes]
111. (hist) ‎Exploring schedules for incremental and annealing quantization algorithms ‎[6,214 bytes]
112. (hist) ‎Adaptively Controlled Polarization And Hysteresis Curve Tracing For Polymer Piezoelectrics (1 S/B) ‎[6,198 bytes]
113. (hist) ‎Physical Implementation of Ara, PULP's Vector Machine (1-2S) ‎[6,175 bytes]
114. (hist) ‎Development of statistics and contention monitoring unit for PULP ‎[6,171 bytes]
115. (hist) ‎MemPool on HERO (1S) ‎[6,159 bytes]
116. (hist) ‎Deep Unfolding of Iterative Optimization Algorithms ‎[6,125 bytes]
117. (hist) ‎Deep Learning Based Anomaly Detection in ECG Signals Using Foundation Models ‎[6,124 bytes]
118. (hist) ‎Towards Online Training of CNNs: Hebbian-Based Deep Learning ‎[6,095 bytes]
119. (hist) ‎ML based Quantitative Movement Analysis on a Portable IoT Camera (1-2S/B) ‎[6,070 bytes]
120. (hist) ‎Study and Development of Intelligent Capability for Small-Size UAVs ‎[6,065 bytes]
121. (hist) ‎Deep-Learning Based Phoneme Recognition from a Ultra-Low Power Spiking Cochlea ‎[6,065 bytes]
122. (hist) ‎Approximate Matrix Multiplication based Hardware Accelerator to achieve the next 10x in Energy Efficiency: Full System Intregration ‎[6,051 bytes]
123. (hist) ‎Smart Goggles for Visual In-Action Feedback in Ski Jumping (1 M 1-2B/S) ‎[6,042 bytes]
124. (hist) ‎Ibex: Tightly-Coupled Accelerators and ISA Extensions ‎[6,038 bytes]
125. (hist) ‎VLSI Implementation of a Systolic Array for LMMSE Detection in mmWave Massive MIMO-OFDM ‎[6,032 bytes]
126. (hist) ‎Fast Accelerator Context Switch for PULP ‎[5,986 bytes]
127. (hist) ‎VLSI Design of an Asynchronous LDPC Decoder ‎[5,968 bytes]
128. (hist) ‎Self-Learning Drones based on Neural Networks ‎[5,956 bytes]
129. (hist) ‎Securing Block Ciphers against SCA and SIFA ‎[5,949 bytes]
130. (hist) ‎Convolution Neural Networks on our Ultra-Low Power Mult-Core Plattform PULP ‎[5,909 bytes]
131. (hist) ‎BigPULP: Multicluster Synchronization Extensions ‎[5,902 bytes]
132. (hist) ‎Autoencoder Accelerator for On-Chip Semi-Supervised Learning ‎[5,886 bytes]
133. (hist) ‎Efficient NB-IoT Uplink Design ‎[5,872 bytes]
134. (hist) ‎A FPGA-based data streaming system that enables real-time monitoring of cell culture and neuroactivities ‎[5,826 bytes]
135. (hist) ‎Evaluating SoA Post-Training Quantization Algorithms ‎[5,818 bytes]
136. (hist) ‎BigPULP: Shared Virtual Memory Multicluster Extensions ‎[5,818 bytes]
137. (hist) ‎Huawei Research ‎[5,815 bytes]
138. (hist) ‎Deep neural networks for seizure detection ‎[5,798 bytes]
139. (hist) ‎Vector-based Parallel Programming Optimization of Communication Algorithm (1-2S/B) ‎[5,792 bytes]
140. (hist) ‎Real-Time Motor-Imagery Classification Using Neuromorphic Processor ‎[5,779 bytes]
141. (hist) ‎Wireless In Action Data Streaming in Ski Jumping (1 B/S) ‎[5,770 bytes]
142. (hist) ‎Approximate Matrix Multiplication based Hardware Accelerator to achieve the next 10x in Energy Efficiency: Training Strategy And Algorithmic optimizations ‎[5,756 bytes]
143. (hist) ‎Streaming Integer Extensions for Snitch (M/1-2S) ‎[5,741 bytes]
144. (hist) ‎Autonomous Sensing For Trains In The IoT Era ‎[5,717 bytes]
145. (hist) ‎Indoor Smart Tracking of Hospital instrumentation ‎[5,695 bytes]
146. (hist) ‎Transformer Deployment on Heterogeneous Many-Core Systems ‎[5,672 bytes]
147. (hist) ‎Edge Computing for Long-Term Wearable Biomedical Systems ‎[5,664 bytes]
148. (hist) ‎HERO: TLB Invalidation ‎[5,657 bytes]
149. (hist) ‎Mapping Networks on Reconfigurable Binary Engine Accelerator ‎[5,655 bytes]
150. (hist) ‎Hardware Constrained Neural Architechture Search ‎[5,648 bytes]
151. (hist) ‎NVDLA meets PULP ‎[5,641 bytes]
152. (hist) ‎Novel Methods for Jammer Mitigation ‎[5,640 bytes]
153. (hist) ‎Hyper-Dimensional Computing Based Predictive Maintenance ‎[5,615 bytes]
154. (hist) ‎Probing the limits of fake-quantised neural networks ‎[5,590 bytes]
155. (hist) ‎Training and Deploying Next-Generation Quantized Neural Networks on Microcontrollers ‎[5,588 bytes]
156. (hist) ‎Implementation of an Accelerator for Retentive Networks (1-2S) ‎[5,566 bytes]
157. (hist) ‎Weak-strong massive MIMO communication with low-resolution ADCs ‎[5,552 bytes]
158. (hist) ‎ASIC Implementation of Jammer Mitigation ‎[5,552 bytes]
159. (hist) ‎Neuromorphic Intelligence In An Embedded System in Collaboration with AiCTX ‎[5,537 bytes]
160. (hist) ‎Development Of A Test Bed For Ultrasonic Transducer Characterization (1 S/B) ‎[5,535 bytes]
161. (hist) ‎Visualization of Neural Architecture Search Spaces ‎[5,504 bytes]
162. (hist) ‎Design and Evaluation of a Small Size Avalanche Beacon ‎[5,483 bytes]
163. (hist) ‎Design of a Scalable High-Performance and Low-Power Interface Based on the I3C Protocol (1-3S/B) ‎[5,473 bytes]
164. (hist) ‎Design of an Area-Optimized Soft-Error Resilient Processing Core for Safety-Critical Systems (1M) ‎[5,473 bytes]
165. (hist) ‎Design and Implementation of Digital Spiking Neurons for Ultra-Low-Power In-Cluster Coprocessors ‎[5,469 bytes]
166. (hist) ‎Skin Coupling Media Characterization For Fitness Tracker Applications (1 B/S) ‎[5,458 bytes]
167. (hist) ‎Outdoor Precision Object Tracking for Rockfall Experiments ‎[5,453 bytes]
168. (hist) ‎Autonomous Sensors For Underwater Monitoring In Smart Navy Systems ‎[5,451 bytes]
169. (hist) ‎PULPonFPGA: Lightweight Virtual Memory Support - Software Cache ‎[5,448 bytes]
170. (hist) ‎Skin coupling media characterization for fitnesstracker applications (1 B/S) ‎[5,446 bytes]
171. (hist) ‎Reconfigurable Fully-Unrolled 2D-FFT Core Generator for Multi-Antenna mmWave Communication ‎[5,440 bytes]
172. (hist) ‎Wireless Sensing With Long Range Comminication (LoRa) ‎[5,433 bytes]
173. (hist) ‎Efficient TNN Inference on PULP Systems ‎[5,407 bytes]
174. (hist) ‎Change-based Evaluation of Convolutional Neural Networks ‎[5,393 bytes]
175. (hist) ‎Pressure and acoustic Smart Sensors Network for Wind Turbines Monitoring ‎[5,389 bytes]
176. (hist) ‎Design-Space Exploration of Low-Resolution Matrix-Vector Multipliers ‎[5,381 bytes]
177. (hist) ‎Tiny CNNs for Ultra-Efficient Object Detection on PULP ‎[5,343 bytes]
178. (hist) ‎PULPonFPGA: Lightweight Virtual Memory Support - Page Table Walker ‎[5,233 bytes]
179. (hist) ‎A Demonstrator of Non-Synchronized Hyperdimensional Body Area Networks ‎[5,228 bytes]
180. (hist) ‎Virtual Memory Ara ‎[5,215 bytes]
181. (hist) ‎Aliasing-Free Wavetable Music Synthesizer ‎[5,197 bytes]
182. (hist) ‎Ternary Weights Engine For Efficient Many Channels Spike Sorting Applications ‎[5,193 bytes]
183. (hist) ‎PULPonFPGA: Hardware L2 Cache ‎[5,178 bytes]
184. (hist) ‎Digitally-Controlled Analog Subtractive Sound Synthesis ‎[5,151 bytes]
185. (hist) ‎Combining Spiking Neural Networks with Hyperdimensional Computing for Autonomous Navigation ‎[5,127 bytes]
186. (hist) ‎Low Power Geolocalization And Indoor Localization ‎[5,119 bytes]
187. (hist) ‎Experimental Validation of Impact Ionization Models for TCAD Simulation by a Novel Characterization Technique ‎[5,113 bytes]
188. (hist) ‎Real-Time Optical Flow Using Neural Networks ‎[5,107 bytes]
189. (hist) ‎Neural Architecture Search using Reinforcement Learning and Search Space Reduction ‎[5,098 bytes]
190. (hist) ‎Spiking Neural Network for Motor Function Decoding Based on Neural Dust ‎[5,083 bytes]
191. (hist) ‎Analysis of Low-Power Wide Area Network Technologies for the Internet of Things ‎[5,067 bytes]
192. (hist) ‎Wake Up Radio For Energy Efficient Communication System and IC Design ‎[5,067 bytes]
193. (hist) ‎Predictable Execution on GPU Caches ‎[5,062 bytes]
194. (hist) ‎Implementation of a Heterogeneous System for Image Processing on an FPGA (S) ‎[5,057 bytes]
195. (hist) ‎Smart Wearable System For Vital Sign Monitoring Exploiting On Board and Cloud Machine Learning ‎[5,055 bytes]
196. (hist) ‎Developing a small portable neutron detector for detecting smuggled nuclear material ‎[5,029 bytes]
197. (hist) ‎Trace Debugger for custom RISC-V Core ‎[5,023 bytes]
198. (hist) ‎Through Wall Radar Imaging using Machine Learning ‎[5,006 bytes]
199. (hist) ‎An Industrial-grade Bluetooth LE Mesh Network Solution ‎[5,005 bytes]
200. (hist) ‎Alias-Free Oscillator Synchronization for Arbitrary Waveforms ‎[4,982 bytes]
201. (hist) ‎Real-Time Implementation of Quantum State Identification using an FPGA ‎[4,959 bytes]
202. (hist) ‎Accurate deep learning inference using computational memory ‎[4,931 bytes]
203. (hist) ‎Artificial Reverberation for Embedded Systems ‎[4,929 bytes]
204. (hist) ‎Design of a Reconfigurable Vector Processor Cluster for Area Efficient Radar Processing (1M) ‎[4,904 bytes]
205. (hist) ‎Elliptic Curve Accelerator for zkSNARKs ‎[4,904 bytes]
206. (hist) ‎BCI-controlled Drone ‎[4,903 bytes]
207. (hist) ‎Standard Cell Compatible Memory Array Design ‎[4,900 bytes]
208. (hist) ‎Short Range Radars For Biomedical Application ‎[4,883 bytes]
209. (hist) ‎Signal Acquisition and Clock Offset Compensation for High-Rate Pulse UWB PHYs ‎[4,874 bytes]
210. (hist) ‎Towards global Brain-Computer Interfaces ‎[4,872 bytes]
211. (hist) ‎Passive Radar for UAV Detection using Machine Learning ‎[4,868 bytes]
212. (hist) ‎Knowledge Distillation for Embedded Machine Learning ‎[4,841 bytes]
213. (hist) ‎Design and VLSI Implementation of a Constrained-Viterbi Algorithm Equalizer for 3GPP TD-HSPA ‎[4,841 bytes]
214. (hist) ‎A Wearable System To Control Phone And Electronic Device Without Hands ‎[4,821 bytes]
215. (hist) ‎Counter-based Fast Power Estimation using FPGAs (M/1-3S) ‎[4,808 bytes]
216. (hist) ‎Memory Augmented Neural Networks in Brain-Computer Interfaces ‎[4,791 bytes]
217. (hist) ‎Ibex: FPGA Optimizations ‎[4,790 bytes]
218. (hist) ‎BirdGuard ‎[4,780 bytes]
219. (hist) ‎Real-Time Embedded Classification of Neural Activity in Rat Barrel Cortex ‎[4,766 bytes]
220. (hist) ‎Improving Cold-Start in Batteryless And Energy Harvesting Systems ‎[4,757 bytes]
221. (hist) ‎Contrastive Learning for Self-supervised Clustering of iEEG Data for Epileptic Patients ‎[4,747 bytes]
222. (hist) ‎Modular Frequency-Modulation (FM) Music Synthesizer ‎[4,741 bytes]
223. (hist) ‎Contextual Intelligence on Resource-constraint Bluetooth LE IoT Devices ‎[4,722 bytes]
224. (hist) ‎ASIC Implementation of a Low-Power mmWave Massive MIMO Equalizer with a Custom Number Format ‎[4,720 bytes]
225. (hist) ‎HW/SW Safety and Security ‎[4,719 bytes]
226. (hist) ‎Phase-change memory devices for emerging computing paradigms ‎[4,714 bytes]
227. (hist) ‎Extended Verification for Ara ‎[4,709 bytes]
228. (hist) ‎Design and implementation of the front-end for a portable ionizing radiation detector ‎[4,705 bytes]
229. (hist) ‎Deep Convolutional Autoencoder for iEEG Signals ‎[4,705 bytes]
230. (hist) ‎Classification of Evoked Local-Field Potentials in Rat Barrel Cortex using Hyper-dimensional Computing ‎[4,702 bytes]
231. (hist) ‎Towards Flexible and Printable Wearables ‎[4,686 bytes]
232. (hist) ‎Compression of iEEG Data ‎[4,684 bytes]
233. (hist) ‎Energy Efficient Smart Devices For Construction Building Maintenance Hilti Collaboration ‎[4,684 bytes]
234. (hist) ‎Design of an Energy-Efficient Ethernet Interface for Linux-capable Systems ‎[4,679 bytes]
235. (hist) ‎Embedded Systems and autonomous UAVs ‎[4,674 bytes]
236. (hist) ‎Autonomus Drones With Novel Sensors And Ultra Wide Band ‎[4,671 bytes]
237. (hist) ‎Embedded Gesture Recognition Using Novel Mini Radar Sensors ‎[4,651 bytes]
238. (hist) ‎Main Page ‎[4,639 bytes]
239. (hist) ‎Monocular Vision-based Object Following on Nano-size Robotic Blimp ‎[4,615 bytes]
240. (hist) ‎Nanoelectrode array biosensors - programmable non-overlapping clocks generator project ‎[4,614 bytes]
241. (hist) ‎A Wireless Sensor Network for HPC monitoring ‎[4,609 bytes]
242. (hist) ‎Towards The Integration of E-skin into Prosthetic Devices ‎[4,596 bytes]
243. (hist) ‎OpenRISC SoC for Sensor Applications ‎[4,575 bytes]
244. (hist) ‎Beamspace processing for 5G mmWave massive MIMO on GPU ‎[4,556 bytes]
245. (hist) ‎Digital Audio Interface for Smart Intensive Computing Triggering ‎[4,553 bytes]
246. (hist) ‎Ibex: Bit-Manipulation Extension ‎[4,549 bytes]
247. (hist) ‎BLISS - Battery-Less Identification System for Security ‎[4,534 bytes]
248. (hist) ‎Level Crossing ADC For a Many Channels Neural Recording Interface ‎[4,526 bytes]
249. (hist) ‎Peak-to-average power Reduction ‎[4,518 bytes]
250. (hist) ‎A Waypoint-based Navigation System for Nano-Size UAVs in GPS-denied Environments ‎[4,518 bytes]

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