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Showing below up to 100 results in range #1 to #100.

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  1. Digital‏‎ (15 categories)
  2. BigPULP: Multicluster Synchronization Extensions‏‎ (14 categories)
  3. Smart Virtual Memory Sharing‏‎ (13 categories)
  4. Low-Energy Cluster-Coupled Vector Coprocessor for Special-Purpose PULP Acceleration‏‎ (13 categories)
  5. Manycore System on FPGA (M/S/G)‏‎ (13 categories)
  6. Hypervisor Extension for Ariane (M)‏‎ (13 categories)
  7. High-Speed Channel Estimation & Tracking for V2X Communications‏‎ (12 categories)
  8. Machine Learning-based Compressive Sensing Vehicle Location Tracking ASIC Design‏‎ (12 categories)
  9. Baseband Meets CPU‏‎ (12 categories)
  10. High-Throughput Channel Coding & Decoding for V2X Communications‏‎ (12 categories)
  11. Efficient Synchronization of Manycore Systems (M/1S)‏‎ (12 categories)
  12. An RPC DRAM Implementation for Energy-Efficient ASICs (1-2S)‏‎ (12 categories)
  13. Implementing DSP Instructions in Banshee (1S)‏‎ (12 categories)
  14. Streaming Integer Extensions for Snitch (M/1-2S)‏‎ (12 categories)
  15. PULPonFPGA: Lightweight Virtual Memory Support - Coherency Extensions‏‎ (12 categories)
  16. Real-Time ECG Contractions Classification‏‎ (12 categories)
  17. PULPonFPGA: Lightweight Virtual Memory Support - Multi-Level TLB‏‎ (12 categories)
  18. Transforming MemPool into a CGRA (M)‏‎ (12 categories)
  19. PULPonFPGA: Lightweight Virtual Memory Support - Page Table Walker‏‎ (12 categories)
  20. Bringup and Evaluation of an Energy-efficient Heterogeneous Manycore Compute Platform (1-2S)‏‎ (12 categories)
  21. Implementation of a Small and Energy-Efficient RISC-V-based Vector Accelerator (1M)‏‎ (11 categories)
  22. Fast Accelerator Context Switch for PULP‏‎ (11 categories)
  23. SCMI Support for Power Controller Subsystem‏‎ (11 categories)
  24. CLIC for the CVA6‏‎ (11 categories)
  25. Wearable Ultrasound for Artery monitoring‏‎ (11 categories)
  26. A Flexible Peripheral System for High-Performance Systems on Chip (M)‏‎ (11 categories)
  27. BigPULP: Shared Virtual Memory Multicluster Extensions‏‎ (11 categories)
  28. Creating a HDMI Video Interface for PULP‏‎ (11 categories)
  29. LLVM and DaCe for Snitch (1-2S)‏‎ (11 categories)
  30. Memory Augmented Neural Networks in Brain-Computer Interfaces‏‎ (11 categories)
  31. Efficient TNN Inference on PULP Systems‏‎ (11 categories)
  32. Towards the Ariane Desktop: Display Output for Ariane on FPGA under Linux (S/B/G)‏‎ (11 categories)
  33. Compression of Ultrasound data on FPGA‏‎ (11 categories)
  34. A Wireless Sensor Network for HPC monitoring‏‎ (11 categories)
  35. Cerebellum: Design of a Programmable Smart-Peripheral for the Ariane Core‏‎ (11 categories)
  36. Non-blocking Algorithms in Real-Time Operating Systems‏‎ (11 categories)
  37. Minimum Variance Beamforming for Wearable Ultrasound Probes‏‎ (11 categories)
  38. Training and Deploying Next-Generation Quantized Neural Networks on Microcontrollers‏‎ (11 categories)
  39. Mixed-Precision Neural Networks for Brain-Computer Interface Applications‏‎ (11 categories)
  40. A Snitch-based Compute Accelerator for HERO (M/1-2S)‏‎ (11 categories)
  41. Enabling Standalone Operation for a Mobile Health Platform‏‎ (10 categories)
  42. Physical Implementation of Ara, PULP's Vector Machine (1-2S)‏‎ (10 categories)
  43. IP-Based SoC Generation and Configuration (1-3S/B)‏‎ (10 categories)
  44. Automatic unplugging detection for Ultrasound probes‏‎ (10 categories)
  45. PULPonFPGA: Lightweight Virtual Memory Support - Software Cache‏‎ (10 categories)
  46. Exploration and Hardware Acceleration of Intra-Layer Mixed-Precision QNNs‏‎ (10 categories)
  47. Physical Implementation of MemPool, PULP's Manycore System (1M/1-2S)‏‎ (10 categories)
  48. ISA extensions in the Snitch Processor for Signal Processing (M)‏‎ (10 categories)
  49. A Unified Compute Kernel Library for Snitch (1-2S)‏‎ (10 categories)
  50. Efficient Memory Stream Handling in RISC-V-based Systems (M/1-2S)‏‎ (10 categories)
  51. PULP’s CLIC extensions for fast interrupt handling‏‎ (10 categories)
  52. Deep Learning-based Global Local Planner for Autonomous Nano-drones‏‎ (10 categories)
  53. Design and Implementation of a multi-mode multi-master I2C peripheral‏‎ (10 categories)
  54. Multi issue OoO Ariane Backend (M)‏‎ (10 categories)
  55. Evaluating SoA Post-Training Quantization Algorithms‏‎ (10 categories)
  56. Fast Simulation of Manycore Systems (1S)‏‎ (10 categories)
  57. Knowledge Distillation for Embedded Machine Learning‏‎ (10 categories)
  58. Floating-Point Divide & Square Root Unit for Transprecision‏‎ (10 categories)
  59. Accelerator for Spatio-Temporal Video Filtering‏‎ (10 categories)
  60. Ultrasound Doppler system development‏‎ (10 categories)
  61. An FPGA-Based Testbed for 3G Mobile Communications Receivers‏‎ (10 categories)
  62. Implementation of the RISC-V Bit Manipulation (RVB) extensions for our RISC-V core‏‎ (10 categories)
  63. Ibex: Tightly-Coupled Accelerators and ISA Extensions‏‎ (10 categories)
  64. Digital Front End Design & Frequency Offset Estimation for V2X Communications‏‎ (10 categories)
  65. Shared Correlation Accelerator for an RF SoC‏‎ (10 categories)
  66. Smart e-glasses for concealed recording of EEG signals‏‎ (10 categories)
  67. Wireless Communication Systems for the IoT‏‎ (10 categories)
  68. Next Generation Synchronization Signals‏‎ (10 categories)
  69. A Novel Execution Scheme for Ultra-tiny CNNs Aboard Nano-UAVs‏‎ (10 categories)
  70. StoneEDGE: An EC-GSM-IoT and Evolved EDGE PHY ASIC‏‎ (10 categories)
  71. PULPonFPGA: Hardware L2 Cache‏‎ (10 categories)
  72. Heroino: Design of the next CORE-V Microcontroller‏‎ (10 categories)
  73. Design of an Ultra-Reliable Low-Latency Modem‏‎ (10 categories)
  74. Battery indifferent wearable Ultrasound‏‎ (10 categories)
  75. Timing Channel Mitigations for RISC-V Cores‏‎ (10 categories)
  76. Visualizing Functional Microbubbles using Ultrasound Imaging‏‎ (10 categories)
  77. Improved Collision Avoidance for Nano-drones‏‎ (10 categories)
  78. Extend the RI5CY core with priviledge extensions‏‎ (10 categories)
  79. GUI-developement for an action-cam-based eye tracking device‏‎ (10 categories)
  80. Enhancing our DMA Engine with Fault Tolerance‏‎ (10 categories)
  81. A Snitch-Based SoC on iCE40 FPGAs (1-2S/B)‏‎ (10 categories)
  82. Bridging QuantLab with LPDNN‏‎ (10 categories)
  83. Low Latency Brain-Machine Interfaces‏‎ (10 categories)
  84. Design of combined Ultrasound and Electromyography systems‏‎ (10 categories)
  85. Real-Time Embedded Classification of Neural Activity in Rat Barrel Cortex‏‎ (10 categories)
  86. Spatio-Temporal Video Filtering‏‎ (10 categories)
  87. Ottocore: A Minimal RISC-V Core Designed for Teaching (B/2G)‏‎ (10 categories)
  88. Enhancing our DMA Engine with Vector Processing Capabilities (1-2S/B)‏‎ (10 categories)
  89. BCI-controlled Drone‏‎ (10 categories)
  90. Integrating Hardware Accelerators into Snitch (1S)‏‎ (10 categories)
  91. IoT Turbo Decoder‏‎ (10 categories)
  92. Watchdog Timer for PULP‏‎ (10 categories)
  93. PULPonFPGA: Lightweight Virtual Memory Support - Physically Contiguous Memory‏‎ (10 categories)
  94. BLISS - Battery-Less Identification System for Security‏‎ (9 categories)
  95. Ternary Neural Networks for Face Recognition‏‎ (9 categories)
  96. Improving Cold-Start in Batteryless And Energy Harvesting Systems‏‎ (9 categories)
  97. Real-Time Motor-Imagery Classification Using Neuromorphic Processor‏‎ (9 categories)
  98. SmartRing‏‎ (9 categories)
  99. Spiking Neural Network for Motor Function Decoding Based on Neural Dust‏‎ (9 categories)
  100. Flexfloat DL Training Framework‏‎ (9 categories)

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