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From iis-projects
- 17:30, 20 October 2021 VLSI Design of an Asynchronous LDPC Decoder (hist) [5,968 bytes] Studer (talk | contribs) (Created page with "File:Iip_async_ldpc.png|350px|thumb|Left: Factor graph describing a simple LDPC code; middle: dataflow of asynchronous VLSI designs; right: automatically-generated layout of...")
- 16:49, 28 September 2021 Resource-Constrained Few-Shot Learning for Keyword Spotting (1S) (hist) [11,255 bytes] Cioflanc (talk | contribs) (Created page with "<!-- Resource-Constrained Few-Shot Learning for Keyword Spotting (1S) --> = Overview = == Status: Available == * Type: Semester Thesis * Professor: Prof. Dr. L. Benini * Su...")
- 12:53, 27 September 2021 Feature Extraction for Speech Recognition (1S) (hist) [11,895 bytes] Cioflanc (talk | contribs) (Created page with "<!-- Feature Extraction for Speech Recognition (1S) --> = Overview = == Status: Available == * Type: Semester Thesis * Professor: Prof. Dr. L. Benini * Supervisors: ** Cris...")
- 18:43, 24 September 2021 Probing the limits of fake-quantised neural networks (hist) [5,570 bytes] Spmatteo (talk | contribs) (Created page with "==Short Description== Abstract of the project ===Status: Available === : Looking for 1 Semester/Master students : Contact: Matteo Spallanzani ===Prerequi...")
- 16:59, 16 September 2021 Every individual on the planet should have a real chance to obtain personalized medical therapy (hist) [3,103 bytes] Emborasa (talk | contribs) (Created page with "==The Big Picture == LSPR AG, a Swiss deep tech startup company, develops the 4th generation DNA single molecule, plasmonic DNA sequencing technology with the objective of pro...")
- 11:44, 16 September 2021 Analog Compute-in-Memory Accelerator Interface and Integration (hist) [2,792 bytes] Liaoj (talk | contribs) (Created page with " === Description === The continuous development and use of computation- and memory-intensive algorithms, such as Deep Neural Networks (DNNs) are currently being limited by the...")
- 15:44, 15 September 2021 Analog building blocks for mmWave manipulation (hist) [2,064 bytes] Guichemerre (talk | contribs) (Created page with "File:VCO2.png|400px|thumb|right|M. W. Mansha and M. M. Hella, "A 148-GHz Radiator Using a Coupled Loop Oscillator With a Quad-Feed Antenna in 22-nm FD-SOI," in IEEE Journal...")
- 14:45, 15 September 2021 A mmWave Voltage-Controlled-Oscillator (VCO) for beyond 5G applications (hist) [2,135 bytes] Guichemerre (talk | contribs) (Created page with "400px|thumb|right ==Short Description== While the fifth generation (5G) of wireless communication systems is being commercialized, research...")
- 10:04, 14 September 2021 Bluetooth Low Energy network with optimized data throughput (hist) [1,860 bytes] Mocquard (talk | contribs) (Created page with "File:A-typical-Bluetooth-Piconet.png|300px|thumb|right|A typical Bluetooth Piconet network (Chaudhry, M. J., Zahid, M., Saleemi, F., & Chaudhry, F. J. (2010). Routing techni...")
- 14:52, 11 September 2021 Machine Learning for extracting Muscle features using Ultrasound 2 (hist) [2,025 bytes] Cosandre (talk | contribs) (Created page with "400px|thumb|right| == Short Description == Ultrasound imaging is a non-invasive imaging technique that provides visible information on the st...")
- 11:45, 10 September 2021 EEG artifact detection with machine learning (hist) [4,145 bytes] Thoriri (talk | contribs) (Created page with "Category:HotCategory:Human IntranetCategory:Epilepsy thumb|300px === Introduction === Epilepsy is a central nervous system disorder in wh...")
- 17:13, 1 September 2021 Novel Methods for Jammer Mitigation (hist) [5,622 bytes] Gimarti (talk | contribs) (Created page with "400px|thumb|A jammer tries to disrupt multiple user equipments from transmitting data to a basestation by injecting interference. ==Short Description=...")
- 10:54, 31 August 2021 Design of Time-Encoded Spiking Neural Networks (IBM-Zurich) (hist) [2,589 bytes] Liaoj (talk | contribs) (Created page with "=== Description === Powerful models that rely on artificial neural networks (ANNs) have acquired wide popularity in the last decade. Spiking neural networks (SNNs) represent a...")
- 22:30, 23 August 2021 EEG artifact detection for epilepsy monitoring (hist) [2,332 bytes] Thoriri (talk | contribs) (Created page with "Category:HotCategory:Human Intranet thumb|300px === Introduction === Epilepsy is a central nervous system disorder in which brain activity be...")
- 14:37, 11 August 2021 Design of MEMs Sensor Interface (hist) [2,796 bytes] Hghiasi (talk | contribs) (Created page with " === Description === Microelectromechanical systems (MEMs) have been widely used as sensors in different applications such as acoustic sensors. In this domain, MEMs capacitanc...")
- 15:08, 10 August 2021 Exploration and Hardware Acceleration of Intra-Layer Mixed-Precision QNNs (hist) [3,465 bytes] Paulsc (talk | contribs) (Created page with "<!-- Exploration and Hardware Acceleration of Intra-Layer Mixed-Precision QNNs --> Category:Digital Category:Deep Learning Projects Category:Acceleration_and_Transp...")
- 11:29, 10 August 2021 Efficient Memory Stream Handling in RISC-V-based Systems (M/1-2S) (hist) [4,006 bytes] Paulsc (talk | contribs) (Created page with "<!-- Efficient Memory Stream Handling in RISC-V-based Systems (M/1-2S) --> <!-- TODO: remove safety Category:Digital Category:High Performance SoCs Category:Computer...")
- 11:21, 10 August 2021 Universal Stream Semantic Registers for Snitch (1S) (hist) [3,231 bytes] Paulsc (talk | contribs) (Created page with "<!-- Universal Stream Semantic Registers for Snitch (1S) --> <!-- TODO: unlock safety Category:Digital Category:High Performance SoCs Category:Computer Architecture...")
- 12:45, 4 August 2021 Implementation of a Small and Energy-Efficient RISC-V-based Vector Accelerator (1M) (hist) [10,773 bytes] Matheusd (talk | contribs) (Created page with "<!-- Implementation of a Small and Energy-Efficient RISC-V-based Vector Accelerator (1M) --> = Overview = == Status: Available == * Type: Master's Thesis * Professor: Prof....")
- 17:16, 2 August 2021 Fast Simulation of Manycore Systems (1S) (hist) [9,741 bytes] Sriedel (talk | contribs) (Created page with "<!-- Fast Simulation of Manycore Systems (1S) --> = Overview = == Status: Available == * Type: Semester Thesis * Professor: Prof. Dr. L. Benini * Supervisors: ** :User:Sr...")
- 12:30, 27 July 2021 Test page (hist) [16 bytes] Vladn (talk | contribs) (Created page with "Vlad's test page")
- 13:05, 23 July 2021 Unconventional phase change memory device concepts for in-memory and neuromorphic computin (hist) [4,001 bytes] Emborasa (talk | contribs) (Created page with "==Short Description== Excellent as it is, the phase change technology has its challenges that need to be overcome at both the hardware and algorithmic levels when building up...")
- 17:36, 16 July 2021 Ternary Neural Networks for Face Recognition (hist) [2,827 bytes] Georg (talk | contribs) (Created page with "==Introduction== Face recognition is among the many tasks that can be solved with great accuracy using deep learning techniques. Recent work has demonstrated that this task ca...")
- 16:56, 16 July 2021 Training and Deploying Tiny Mixed-Precision Networks (hist) [5,588 bytes] Georg (talk | contribs) (Created page with "==Description== The design and deployment of highly efficient neural networks (NNs) to be executed on microcontroller-class systems (MCUs) has seen intense attention from the...")
