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- 12:12, 14 September 2022 On-Device Training Sparse Sub-Tensor Update Scheme Optimization for CNN-based tasks (SA or MA) (hist) [6,948 bytes] Jungvi (talk | contribs) (Created page with "<!-- On-Device Training Sparse Sub-Tensor Update Scheme Optimization for CNN-based tasks (SA or MA) --> = Overview = == Status: Available == * Type: Semester Thesis * Profe...")
- 12:11, 14 September 2022 On-Device Training Sparse Sub-Tensor Update Scheme Optimization for CNN-based tasks (hist) [0 bytes] Jungvi (talk | contribs) (Created page with "<!-- On-Device Training Sparse Sub-Tensor Update Scheme Optimization for CNN-based tasks (SA or MA) --> = Overview = == Status: Available == * Type: Semester Thesis * Profe...")
- 11:14, 13 September 2022 Approximate Matrix Multiplication based Hardware Accelerator to achieve the next 10x in Energy Efficiency: Training Strategy And Algorithmic optimizations (hist) [5,600 bytes] Andrire (talk | contribs) (Created page with "<!-- Approximate Matrix Multiplication based Hardware Accelerator to achieve the next 10x in Energy Efficiency: Full System Integration (2S,1M) --> Category:Digital Cat...")
- 10:55, 13 September 2022 Approximate Matrix Multiplication based Hardware Accelerator to achieve the next 10x in Energy Efficiency: Full System Intregration (hist) [5,819 bytes] Andrire (talk | contribs) (Created page with "<!-- Approximate Matrix Multiplication based Hardware Accelerator to achieve the next 10x in Energy Efficiency: Full System Integration (2S,1M) --> Category:Digital Cat...")
- 16:06, 9 September 2022 Ultrasound based hand gesture recognition (hist) [2,557 bytes] Cosandre (talk | contribs) (Created page with "thumb|right|400px == Short Description == Ultrasound (US) imaging is a non-invasive imaging technique that provides visible information on the structure...")
- 13:30, 29 August 2022 Development of statistics and contention monitoring unit for PULP (hist) [6,173 bytes] Aottaviano (talk | contribs) (Created page with "<!-- Development of statistics and contention monitoring unit for PULP --> Category:Digital Category:Computer Architecture Category:SW/HW Predictability and Securit...")
- 15:47, 22 August 2022 Design of combined Ultrasound and PPG systems (hist) [2,502 bytes] Cosandre (talk | contribs) (Created page with "thumb|right|400px == Short Description == Ultrasound (US) imaging is a non-invasive imaging technique that provides visible information on the structure...")
- 09:35, 17 August 2022 Design of a Prototype Chip with Interleaved Memory and Network-on-Chip (hist) [2,152 bytes] Fischeti (talk | contribs) (Created page with "<!-- Design of a Prototype Chip with Interleaved Memory and Network-on-Chip (1S) --> Category:Digital Category:High Performance SoCs [[Category:Computer Architecture]...")
- 19:58, 15 August 2022 A Flexible FPGA-Based Peripheral Platform Extending Linux-Capable Systems on Chip (1-3S/B) (hist) [2,827 bytes] Nwistoff (talk | contribs) (Created page with "Category:Digital Category:High Performance SoCs Category:Computer Architecture Category:FPGA Category:2022 Category:Semester Thesis Category:Bachelor...")
- 18:20, 15 August 2022 Improving SystemVerilog Support for Free And Open-Source EDA Tools (1-3S/B) (hist) [2,710 bytes] Tbenz (talk | contribs) (Created page with "<!-- Creating Improving SystemVerilog Support for Free And Open-Source EDA Tools (1-3S/B) --> Category:Digital Category:High Performance SoCs Category:Computer Arch...")
- 17:26, 15 August 2022 MCU Bus and Memory Generator: implementation of a Highly Configurable bus and memory subsystem for a RISC-V based microcontroller. (hist) [8,170 bytes] Pschiavo (talk | contribs) (Created page with "==Introduction== Microcontrollers (MCUs) are used in a wide range of applications ranging from sensor-monitoring all the way to robotics. Despite typically lower in performa...")
- 15:31, 15 August 2022 Accelerating Stencil Workloads on Snitch using ISSRs (1-2S/B) (hist) [3,375 bytes] Paulsc (talk | contribs) (Created page with "<!-- Accelerating Stencil Workloads on Snitch using ISSRs (1-2S/B) --> Category:Digital Category:High Performance SoCs Category:Computer Architecture Category:2...")
- 14:05, 15 August 2022 An Efficient Compiler Backend for Snitch (1S/B) (hist) [2,667 bytes] Paulsc (talk | contribs) (Created page with "<!-- An Efficient Compiler Backend for Snitch (1S/B) --> Category:Digital Category:High Performance SoCs Category:Computer Architecture Category:2022 Catego...")
- 17:04, 11 August 2022 Efficient Execution of Transformers in RISC-V Vector Machines with Custom HW acceleration (M) (hist) [4,137 bytes] Mperotti (talk | contribs) (Created page with "== 1 Project Description and Timeline == Transformers have set a new standard in natural language processing and other recurrent machine learning tasks (e.g., computer vision...")
- 10:20, 10 August 2022 Implementing Configurable Dual-Core Redundancy (hist) [3,774 bytes] Michaero (talk | contribs) (Created page with "<!-- Implementing Configurable Dual-Core Redundancy (1M/S) --> Category:Digital Category:Fault Tolerance Category:HW/SW Safety and Security Category:Computer Ar...")
- 08:55, 9 August 2022 Marco Bertuletti (hist) [1,096 bytes] Mbertuletti (talk | contribs) (Created page with "== Marco Bertuletti == I completed my B.Sc. and M.Sc. in Electronics Engineering at Politecnico di Milano in July 2019 and December 2021, respectively. Since March 2022, I a...")
- 17:45, 8 August 2022 Running Rust on PULP (hist) [2,302 bytes] Michaero (talk | contribs) (Created page with "<!-- Running Rust on PULP (1S/B) --> Category:Digital Category:High Performance SoCs Category:Computer Architecture Category:Software Category:Rust Cate...")
- 19:19, 5 August 2022 Optimizing the Pipeline in our Floating Point Architectures (1S) (hist) [2,900 bytes] Lbertaccini (talk | contribs) (Created page with "<!-- Optimizing the Pipeline in our Floating Point Architectures (1S) --> Category:Digital Category:Acceleration_and_Transprecision Category:Energy Efficient SoCs...")
- 16:50, 5 August 2022 PULP Freertos with LLVM (hist) [3,185 bytes] Balasr (talk | contribs) (Created page with "<!-- PULP Freertos with LLVM --> Category:Digital Category:Computer Architecture Category:SW/HW Predictability and Security Category:HW/SW Safety and Security...")
- 16:25, 5 August 2022 Zephyr RTOS on PULP (hist) [3,474 bytes] Balasr (talk | contribs) (Created page with "<!-- Zephyr RTOS on PULP --> Category:Digital Category:Computer Architecture Category:SW/HW Predictability and Security Category:HW/SW Safety and Security C...")
- 15:36, 4 August 2022 Integration Of A Smart Vision System (hist) [3,086 bytes] Scheremo (talk | contribs) (Created page with "==Introduction== Vision-based surveillance systems and the data collected by them are important technological building blocks for military and civilian applications. Existing...")
- 21:04, 2 August 2022 Developing a Transposition Unit to Accelerate ML Workloads (1-3S/B) (hist) [1,597 bytes] Tbenz (talk | contribs) (Created page with "<!-- Creating Developing a Transposition Unit to Accelerate ML Workloads (1-3S/B) --> Category:Digital Category:High Performance SoCs Category:Computer Architecture...")
- 20:53, 2 August 2022 Towards Formal Verification of the iDMA Engine (1-3S/B) (hist) [1,954 bytes] Tbenz (talk | contribs) (Created page with "<!-- Creating Towards Formal Verification of the iDMA Engine (1-3S/B) --> Category:Digital Category:High Performance SoCs Category:Computer Architecture Categor...")
- 18:22, 26 July 2022 Event-based navigation on autonomous nano-drones (hist) [3,759 bytes] Dpalossi (talk | contribs) (Created page with "Category:Hot Category:Energy Efficient Autonomous UAVs Category:UAV Category:Software Category:Digital Category:PULP Category:Available Category:...")
- 10:16, 13 July 2022 Modeling High Bandwidth Memory for Rapid Design Space Exploration (1-3S/B) (hist) [1,378 bytes] Tbenz (talk | contribs) (Created page with "<!-- Modeling High Bandwidth Memory for Rapid Design Space Exploration (1-3S/B) --> Category:Digital Category:High Performance SoCs Category:Computer Architecture...")
- 15:34, 11 July 2022 Analysis of Low-Power Wide Area Network Technologies for the Internet of Things (hist) [5,067 bytes] Wiesmayr (talk | contribs) (Created page with "500px|thumb|Low-power wide area wireless sensor network. ==Short Description== A variety of low-power wide area network (LPWAN) standards a...")
- 10:11, 30 June 2022 Spatz grows wings: Physical Implementation of a Vector-Powered Manycore System (2S) (hist) [7,927 bytes] Matheusd (talk | contribs) (Created page with "= Overview = == Status: Available == * Type: Semester Thesis * Professor: Prof. Dr. L. Benini * Supervisors: ** Matheus Cavalcante: [mailto:matheusd@iis...")
- 10:19, 27 June 2022 Creating a Free and Open-Source Verification Environment for Our New DMA Engine (1-3S/B) (hist) [1,647 bytes] Tbenz (talk | contribs) (Created page with "<!-- Creating Creating a Free and Open-Source Verification Environment for Our New DMA Engine (1-3S/B) --> Category:Digital Category:High Performance SoCs Category:...")
- 12:53, 21 June 2022 Fitting Power Consumption of an IP-based HLS Approach to Real Hardware (1-3S) (hist) [1,928 bytes] Tbenz (talk | contribs) (Created page with "<!-- Creating Fitting Power Consumption of an IP-based HLS Approach to Real Hardware (1-3S) --> Category:Digital Category:High Performance SoCs Category:Computer Ar...")
- 12:27, 21 June 2022 Extension and Evaluation of TinyDMA (1-2S/B/2-3G) (hist) [2,184 bytes] Tbenz (talk | contribs) (Created page with "<!-- Creating Extension and Evaluation of TinyDMA (1-2S/B/2-3G) --> Category:Digital Category:High Performance SoCs Category:Computer Architecture Category:2022...")
