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Showing below up to 100 results in range #1 to #100.

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1. (M): A Flexible Peripheral System for High-Performance Systems on Chip
2. 3D Turbo Decoder ASIC Realization
3. 3D Ultrasound Bubble Tracking
4. 4th Generation Synchronization
5. 5G Cellular RF Front-end Design in 22nm CMOS Technology
6. AMZ Driverless Competition Embedded Systems Projects
7. ASIC
8. ASIC Design Projects
9. ASIC Design of a Gaussian Message Passing Processor
10. ASIC Design of a Sigma Point Processor
11. ASIC Development of 5G-NR LDPC Decoder
12. ASIC Implementation of High-Throughput Next Generation Turbo Decoders
13. ASIC Implementation of Jammer Mitigation
14. ASIC Implementation of a Low-Power mmWave Massive MIMO Equalizer with a Custom Number Format
15. ASIC implementation of an interpolation-based wideband massive MIMO detector
16. AXI-based Network on Chip (NoC) system
17. A Demonstrator of Non-Synchronized Hyperdimensional Body Area Networks
18. A Flexible FPGA-Based Peripheral Platform Extending Linux-Capable Systems on Chip (1-3S/B)
19. A Flexible Peripheral System for High-Performance Systems on Chip (M)
20. A Multiview Synthesis Core in 65 nm CMOS
21. A Novel Constrained-Viterbi Algorithm with Linear Equalization and Grouping Assistance
22. A Novel Execution Scheme for Ultra-tiny CNNs Aboard Nano-UAVs
23. A Post-Simulation Trace-Based RISC-V GDB Debugging Server
24. A Recurrent Neural Network Speech Recognition Chip
25. A Snitch-Based SoC on iCE40 FPGAs (1-2S/B)
26. A Snitch-based Compute Accelerator for HERO
27. A Snitch-based Compute Accelerator for HERO (M/1-2S)
28. A Trustworthy Three-Factor Authentication System
29. A Unified-Multiplier Based Hardware Architecture for Elliptic Curve Cryptography
30. A Unified Compute Kernel Library for Snitch (1-2S)
31. A Waypoint-based Navigation System for Nano-Size UAVs in GPS-denied Environments
32. A Wearable System To Control Phone And Electronic Device Without Hands
33. A Wearable System for long term monitoring of human physiological parameters with E skin sensors
34. A Wearable Wireless Kidney Function Monitoring System For BioMedical Applications
35. A Wireless Sensor Network for HPC monitoring
36. A Wireless Sensor Network for a Smart Building Monitor and Control
37. A Wireless Sensor Network for a Smart LED Lighting control
38. A computational memory unit using phase-change memory devices
39. A mmWave Voltage-Controlled-Oscillator (VCO) for beyond 5G applications
40. A reduction-capable AXI XBAR for fast M-to-1 communication (1M)
41. Ab-initio Simulation of Strained Thermoelectric Materials
42. Accelerating Applications Relying on Matrix-Vector-Product-Like Operations
43. Accelerating Stencil Workloads on Snitch using ISSRs (1-2S/B)
44. Acceleration and Transprecision
45. Accelerator for Boosted Binary Features
46. Accelerator for Spatio-Temporal Video Filtering
47. Accelerators for object detection and tracking
48. Accurate deep learning inference using computational memory
49. Active-Set QP Solver on FPGA
50. Adaptively Controlled Polarization And Hysteresis Curve Tracing For Polymer Piezoelectrics (1 S/B)
51. Adding Linux Support to our DMA Engine (1-2S/B)
52. Advanced 5G Repetition Combining
53. Adversarial Attacks Against Deep Neural Networks In Wearable Cameras
54. Alias-Free Oscillator Synchronization for Arbitrary Waveforms
55. Aliasing-Free Wavetable Music Synthesizer
56. All-Digital In-Memory Processing
57. All the flavours of FFT on MemPool (1-2S/B)
58. Ambient RF Energy harvesting for Wireless Sensor Network
59. An Efficient Compiler Backend for Snitch (1S/B)
60. An Energy Efficient Brain-Computer Interface using Mr.Wolf
61. An FPGA-Based Evaluation Platform for Mobile Communications
62. An FPGA-Based Testbed for 3G Mobile Communications Receivers
63. An Industrial-grade Bluetooth LE Mesh Network Solution
64. An RPC DRAM Implementation for Energy-Efficient ASICs (1-2S)
65. An Ultra-Compact High-Power CMOS Power Amplifier for Millimeter-Wave 5G Communications
66. An all Standard-Cell Based Energy Efficient HW Accelerator for DSP and Deep Learning Applications
67. Analog
68. AnalogInt
69. Analog Compute-in-Memory Accelerator Interface and Integration
70. Analog IC Design
71. Analog Layout Engine
72. Analog building blocks for mmWave manipulation
73. Analysis and Design of Power Efficient RF/ mm-Wave LC-tank Oscillator in 28nm for 5G communication applications
74. Analysis of Low-Power Wide Area Network Technologies for the Internet of Things
75. Andrea Cossettini
76. Andreas Kurth
77. Android Software Design
78. Android reliability governor
79. Application Specific Frequency Synthesizers (Analog/Digital PLLs)
80. Approximate Matrix Multiplication based Hardware Accelerator to achieve the next 10x in Energy Efficiency: Full System Intregration
81. Approximate Matrix Multiplication based Hardware Accelerator to achieve the next 10x in Energy Efficiency: Training Strategy And Algorithmic optimizations
82. Ara: Update PULP's Vector Processor with the recent RISC-V Vector Extension Development
83. Assessment of novel photovoltaic architectures by circuit simulation
84. Atretter
85. Audio
86. Audio DAC Conversion Jitter Measurement System
87. Audio Signal Processing
88. Audio Video Preprocessing In Parallel Ultra Low Power Platform
89. Audio Visual Speech Separation and Recognition (1S/1M)
90. Augmenting Our IPs with AXI Stream Extensions (M/1-2S)
91. Autoencoder Accelerator for On-Chip Semi-Supervised Learning
92. Automatic unplugging detection for Ultrasound probes
93. Autonomous Mapping with Nano-Drones UWB and Novel Depth Sensors
94. Autonomous Obstacle Avoidance with Nano-Drones and Novel Depth Sensors
95. Autonomous Sensing For Trains In The IoT Era
96. Autonomous Sensors For Underwater Monitoring In Smart Navy Systems
97. Autonomous Smart Watches: Hardware and Software Desing
98. Autonomous Smart Watches: Toward an ultra low power microphone detector with events classification
99. Autonomus Drones With Novel Sensors And Ultra Wide Band
100. BCI-controlled Drone

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