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Showing below up to 100 results in range #1 to #100.

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  1. (M): A Flexible Peripheral System for High-Performance Systems on Chip
  2. 3D Turbo Decoder ASIC Realization
  3. 3D Ultrasound Bubble Tracking
  4. 4th Generation Synchronization
  5. 5G Cellular RF Front-end Design in 22nm CMOS Technology
  6. AMZ Driverless Competition Embedded Systems Projects
  7. ASIC
  8. ASIC Design Projects
  9. ASIC Design of a Gaussian Message Passing Processor
  10. ASIC Design of a Sigma Point Processor
  11. ASIC Development of 5G-NR LDPC Decoder
  12. ASIC Implementation of High-Throughput Next Generation Turbo Decoders
  13. ASIC Implementation of Jammer Mitigation
  14. ASIC Implementation of a Low-Power mmWave Massive MIMO Equalizer with a Custom Number Format
  15. A Demonstrator of Non-Synchronized Hyperdimensional Body Area Networks
  16. A Flexible Peripheral System for High-Performance Systems on Chip (M)
  17. A Multiview Synthesis Core in 65 nm CMOS
  18. A Novel Constrained-Viterbi Algorithm with Linear Equalization and Grouping Assistance
  19. A Novel Execution Scheme for Ultra-tiny CNNs Aboard Nano-UAVs
  20. A Recurrent Neural Network Speech Recognition Chip
  21. A Snitch-Based SoC on iCE40 FPGAs (1-2S/B)
  22. A Snitch-based Compute Accelerator for HERO
  23. A Snitch-based Compute Accelerator for HERO (M/1-2S)
  24. A Trustworthy Three-Factor Authentication System
  25. A Unified-Multiplier Based Hardware Architecture for Elliptic Curve Cryptography
  26. A Unified Compute Kernel Library for Snitch (1-2S)
  27. A Waypoint-based Navigation System for Nano-Size UAVs in GPS-denied Environments
  28. A Wearable System To Control Phone And Electronic Device Without Hands
  29. A Wearable System for long term monitoring of human physiological parameters with E skin sensors
  30. A Wearable Wireless Kidney Function Monitoring System For BioMedical Applications
  31. A Wireless Sensor Network for HPC monitoring
  32. A Wireless Sensor Network for a Smart Building Monitor and Control
  33. A Wireless Sensor Network for a Smart LED Lighting control
  34. A computational memory unit using phase-change memory devices
  35. A mmWave Voltage-Controlled-Oscillator (VCO) for beyond 5G applications
  36. Ab-initio Simulation of Strained Thermoelectric Materials
  37. Accelerating Applications Relying on Matrix-Vector-Product-Like Operations
  38. Acceleration and Transprecision
  39. Accelerator for Boosted Binary Features
  40. Accelerator for Spatio-Temporal Video Filtering
  41. Accelerators for object detection and tracking
  42. Accurate deep learning inference using computational memory
  43. Active-Set QP Solver on FPGA
  44. Adding Linux Support to our DMA Engine (1-2S/B)
  45. Advanced 5G Repetition Combining
  46. Adversarial Attacks Against Deep Neural Networks In Wearable Cameras
  47. Aliasing-Free Wavetable Music Synthesizer
  48. All-Digital In-Memory Processing
  49. Ambient RF Energy harvesting for Wireless Sensor Network
  50. An Energy Efficient Brain-Computer Interface using Mr.Wolf
  51. An FPGA-Based Evaluation Platform for Mobile Communications
  52. An FPGA-Based Testbed for 3G Mobile Communications Receivers
  53. An Industrial-grade Bluetooth LE Mesh Network Solution
  54. An RPC DRAM Implementation for Energy-Efficient ASICs (1-2S)
  55. An all Standard-Cell Based Energy Efficient HW Accelerator for DSP and Deep Learning Applications
  56. Analog
  57. AnalogInt
  58. Analog Compute-in-Memory Accelerator Interface and Integration
  59. Analog IC Design
  60. Analog Layout Engine
  61. Analog building blocks for mmWave manipulation
  62. Analysis and Design of Power Efficient RF/ mm-Wave LC-tank Oscillator in 28nm for 5G communication applications
  63. Andrea Cossettini
  64. Andreas Kurth
  65. Android Software Design
  66. Android reliability governor
  67. Application Specific Frequency Synthesizers (Analog/Digital PLLs)
  68. Ara: Update PULP's Vector Processor with the recent RISC-V Vector Extension Development
  69. Assessment of novel photovoltaic architectures by circuit simulation
  70. Atretter
  71. Audio
  72. Audio DAC Conversion Jitter Measurement System
  73. Audio Signal Processing
  74. Audio Video Preprocessing In Parallel Ultra Low Power Platform
  75. Augmenting Our IPs with AXI Stream Extensions (M/1-2S)
  76. Autoencoder Accelerator for On-Chip Semi-Supervised Learning
  77. Automatic unplugging detection for Ultrasound probes
  78. Autonomous Mapping with Nano-Drones UWB and Novel Depth Sensors
  79. Autonomous Obstacle Avoidance with Nano-Drones and Novel Depth Sensors
  80. Autonomous Sensing For Trains In The IoT Era
  81. Autonomous Sensors For Underwater Monitoring In Smart Navy Systems
  82. Autonomous Smart Watches: Hardware and Software Desing
  83. Autonomous Smart Watches: Toward an ultra low power microphone detector with events classification
  84. Autonomus Drones With Novel Sensors And Ultra Wide Band
  85. BCI-controlled Drone
  86. BLISS - Battery-Less Identification System for Security
  87. Bandgap voltage reference in 65nm CMOS
  88. Bandwidth Extension with Carrier Aggregation for Mobile Gigabit-Communication
  89. Baseband Meets CPU
  90. Baseband Processor Development for 4G IoT
  91. Bateryless Heart Rate Monitoring
  92. Battery Tester
  93. Battery indifferent wearable Ultrasound
  94. Beamspace processing for 5G mmWave massive MIMO on GPU
  95. Beat Cadence
  96. Beat DigRF
  97. Benjamin Sporrer
  98. Benjamin Weber
  99. BigPULP: Multicluster Synchronization Extensions
  100. BigPULP: Shared Virtual Memory Multicluster Extensions

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