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1. (M): A Flexible Peripheral System for High-Performance Systems on Chip
2. 3D Turbo Decoder ASIC Realization
3. 3D Ultrasound Bubble Tracking
4. 4th Generation Synchronization
5. 5G Cellular RF Front-end Design in 22nm CMOS Technology
6. AMZ Driverless Competition Embedded Systems Projects
7. ASIC
8. ASIC Design Projects
9. ASIC Design of a Gaussian Message Passing Processor
10. ASIC Design of a Sigma Point Processor
11. ASIC Development of 5G-NR LDPC Decoder
12. ASIC Implementation of High-Throughput Next Generation Turbo Decoders
13. ASIC Implementation of Jammer Mitigation
14. ASIC Implementation of a Low-Power mmWave Massive MIMO Equalizer with a Custom Number Format
15. A Demonstrator of Non-Synchronized Hyperdimensional Body Area Networks
16. A Flexible Peripheral System for High-Performance Systems on Chip (M)
17. A Multiview Synthesis Core in 65 nm CMOS
18. A Novel Constrained-Viterbi Algorithm with Linear Equalization and Grouping Assistance
19. A Novel Execution Scheme for Ultra-tiny CNNs Aboard Nano-UAVs
20. A Recurrent Neural Network Speech Recognition Chip

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