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- (M): A Flexible Peripheral System for High-Performance Systems on Chip
- 3D Turbo Decoder ASIC Realization
- 3D Ultrasound Bubble Tracking
- 4th Generation Synchronization
- 5G Cellular RF Front-end Design in 22nm CMOS Technology
- AMZ Driverless Competition Embedded Systems Projects
- ASIC
- ASIC Design Projects
- ASIC Design of a Gaussian Message Passing Processor
- ASIC Design of a Sigma Point Processor
- ASIC Development of 5G-NR LDPC Decoder
- ASIC Implementation of High-Throughput Next Generation Turbo Decoders
- ASIC Implementation of Jammer Mitigation
- ASIC Implementation of a Low-Power mmWave Massive MIMO Equalizer with a Custom Number Format
- ASIC implementation of an interpolation-based wideband massive MIMO detector
- AXI-based Network on Chip (NoC) system
- A Demonstrator of Non-Synchronized Hyperdimensional Body Area Networks
- A Flexible FPGA-Based Peripheral Platform Extending Linux-Capable Systems on Chip (1-3S/B)
- A Flexible Peripheral System for High-Performance Systems on Chip (M)
- A Multiview Synthesis Core in 65 nm CMOS
- A Novel Constrained-Viterbi Algorithm with Linear Equalization and Grouping Assistance
- A Novel Execution Scheme for Ultra-tiny CNNs Aboard Nano-UAVs
- A Post-Simulation Trace-Based RISC-V GDB Debugging Server
- A Recurrent Neural Network Speech Recognition Chip
- A Snitch-Based SoC on iCE40 FPGAs (1-2S/B)
- A Snitch-based Compute Accelerator for HERO
- A Snitch-based Compute Accelerator for HERO (M/1-2S)
- A Trustworthy Three-Factor Authentication System
- A Unified-Multiplier Based Hardware Architecture for Elliptic Curve Cryptography
- A Unified Compute Kernel Library for Snitch (1-2S)
- A Waypoint-based Navigation System for Nano-Size UAVs in GPS-denied Environments
- A Wearable System To Control Phone And Electronic Device Without Hands
- A Wearable System for long term monitoring of human physiological parameters with E skin sensors
- A Wearable Wireless Kidney Function Monitoring System For BioMedical Applications
- A Wireless Sensor Network for HPC monitoring
- A Wireless Sensor Network for a Smart Building Monitor and Control
- A Wireless Sensor Network for a Smart LED Lighting control
- A computational memory unit using phase-change memory devices
- A mmWave Voltage-Controlled-Oscillator (VCO) for beyond 5G applications
- A reduction-capable AXI XBAR for fast M-to-1 communication (1M)
- Ab-initio Simulation of Strained Thermoelectric Materials
- Accelerating Applications Relying on Matrix-Vector-Product-Like Operations
- Accelerating Stencil Workloads on Snitch using ISSRs (1-2S/B)
- Acceleration and Transprecision
- Accelerator for Boosted Binary Features
- Accelerator for Spatio-Temporal Video Filtering
- Accelerators for object detection and tracking
- Accurate deep learning inference using computational memory
- Active-Set QP Solver on FPGA
- Adaptively Controlled Polarization And Hysteresis Curve Tracing For Polymer Piezoelectrics (1 S/B)