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Time Synchronization for 3G Mobile Communications

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Short Description

Setting up the communication link between a mobile phone and the base station is no trivial task. Initially the mobile does not know anything about the base-station. It does not know when the different frames start, what cells are around and which synchronization codes are used. Solving this problem in dedicated hardware will be the topic of this thesis. Synchronization in time will detect the position of the frame boundaries and reveal the Cell ID of the strongest cell. This has to be implemented in hardware, and it is the very first task which is done to for the cellular communication. There are two options for this project. If you are interested in doing a chip design project for the VLSI lectures, you will implement the time synchronization in VHDL, synthesize it, perform the back-end and finally produce an ASIC. On the other hand, if you prefer working with FPGAs, you can alternatively implement the algorithm on an FPGA and test it in real-time and with real data on our 3G testbed.

Status: No Longer Available


MATLAB and VHDL is an advantage
Interest in Mobile Communications


20% Theory/MATLAB
30% VHDL
50% Implementation


Qiuting Huang