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Ultra Low-Power Oscillator

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Successive Approximation Register JSSCAprFig1.png

Short Description

Sensor nodes for the Internet of Things must run autonomously in many cases. This means that their average power consumption must be as low as possible which is often achieved by heavy duty-cycling of operation, i.e. everything that is not needed for a particular operating state is switched off. This puts a big pressure on the power consumption of those circuits that are always on, like e.g. a system clock. So this topic has seen a lot of attention in recent years. The aim of this semester thesis is to build such an ultra low power oscillator for a frequency range up to 1 MHz based on latest research results and to achieve a comparable efficiency as the best design in the figure.


Status: Available

Looking for 1-2 Semester students
Contact: Thomas Burger

Prerequisites

AIC

Character

20% Theory
80% Circuit Design

Professor

Qiuting Huang

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Detailed Task Description

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Practical Details

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