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==Available projects==
 
==Available projects==
 +
* [[Combining Pruning with Quantization for Best-Efficiency Neural Networks]] (semester/master thesis)
 +
<!-- * [[Fighting Adversarial Learning in HW: Security-Aware CNN Acceleration]] (semester/master thesis)  -->
 
* [[Variable Bit Precision Logic for Deep Learning and Artificial Intelligence]] (master thesis)
 
* [[Variable Bit Precision Logic for Deep Learning and Artificial Intelligence]] (master thesis)
 
* [[Embedded Audio Source Localization Exploiting Coincidence Detection in Asynchronous Spike Streams]] (semester/master thesis)
 
* [[Embedded Audio Source Localization Exploiting Coincidence Detection in Asynchronous Spike Streams]] (semester/master thesis)
 
* [[Hardware Accelerators for Lossless Quantized Deep Neural Networks]] (semester/master thesis)
 
* [[Hardware Accelerators for Lossless Quantized Deep Neural Networks]] (semester/master thesis)
* [[Low-Energy Cluster-Coupled Vector Coprocessor for Special-Purpose PULP Acceleration]] (semester/master thesis)
 
 
* [[Towards Online Training of CNNs: Hebbian-Based Deep Learning]] (semester thesis)
 
* [[Towards Online Training of CNNs: Hebbian-Based Deep Learning]] (semester thesis)
* [[Deep-Learning Based Phoneme Recognition from a Ultra-Low Power Spiking Cochlea]] (semester thesis)
 
 
* [[Tiny CNNs for Ultra-Efficient Object Detection on PULP]] (semester thesis)
 
* [[Tiny CNNs for Ultra-Efficient Object Detection on PULP]] (semester thesis)
* [[Single-Bit-Synapse Spiking Neural System-on-Chip]] (master thesis)
+
<!-- * [[Single-Bit-Synapse Spiking Neural System-on-Chip]] (master thesis)-->
 
* You can also '''always''' contact me for projects that have not yet been formalized (semester/master), or with your own project idea!
 
* You can also '''always''' contact me for projects that have not yet been formalized (semester/master), or with your own project idea!
  
==Running projects==
+
==Past projects==
 +
* [[Low-Energy Cluster-Coupled Vector Coprocessor for Special-Purpose PULP Acceleration]] (semester/master thesis)
 +
* [[Deep-Learning Based Phoneme Recognition from a Ultra-Low Power Spiking Cochlea]] (semester thesis)
 
* [[A Low-Power FPGA-Based Camera Sensor Interface for PULP Devices]] (semester thesis)
 
* [[A Low-Power FPGA-Based Camera Sensor Interface for PULP Devices]] (semester thesis)
 
==Completed projects : 2017==
 
 
* [[A Recurrent Neural Network Speech Recognition Chip]] (semester thesis)
 
* [[A Recurrent Neural Network Speech Recognition Chip]] (semester thesis)
 
==Completed projects : 2016==
 
 
* [[Design and Implementation of Digital Spiking Neurons for Ultra-Low-Power In-Cluster Coprocessors]] (master thesis)
 
* [[Design and Implementation of Digital Spiking Neurons for Ultra-Low-Power In-Cluster Coprocessors]] (master thesis)
 
* [[Interfacing PULP with a Brain-Inspired Ultra-Low Power Spiking Cochlea]] (master thesis)
 
* [[Interfacing PULP with a Brain-Inspired Ultra-Low Power Spiking Cochlea]] (master thesis)

Revision as of 15:26, 18 September 2018

Francesco Conti

Fconti.png

I am a postdoctoral researcher here at IIS since July 2016, and I also hold a position as a research assistant at the University of Bologna, Italy. My interests focus on energy-efficient multicore architectures, with particular emphasis on heterogeneous multicores and cognitive computing architectures. I am interested in the entire technological stack "from Python to Silicon".

Interests

  • heterogeneous multicore architectures for energy-efficient and low-power embedded systems
  • applications of deep learning and brain-inspired computational models and architectures to low-power digital systems

Available projects

Past projects

Contact Information