I received my Bachelor's degree in Information Technology and Electrical Engineering from Swiss Federal Institute of Technology Zurich (ETHZ), Switzerland in 2018 and my Master's degree in April 2020. After that, I started as a PhD Student in the digital circuits and systems group of Prof. Dr. L. Benini
My research focus is on deploying Machine Learning Workloads on High-Performance Computing systems. Specifically I am interested in HW/SW Co-design of DNN Training algorithms as well as low-precision floating point DNN training. I have also previously worked onML Hardware Accelerator for edge applications.
- Modeling FlooNoC in GVSoC (S/M)
- Efficient collective communications in FlooNoC (1M)
- Scaleout Study on Interleaved Memory Transfers in Huge Manycore Systems with Multiple HBM Channels (M/1-3S)
- Routing 1000s of wires in Network-on-Chips (1-2S/M)
- Network-on-Chip for coherent and non-coherent traffic (M)
- Energy Efficient AXI Interface to Serial Link Physical Layer