Difference between revisions of "User:Lbertaccini"
From iis-projects
Lbertaccini (talk | contribs) |
Lbertaccini (talk | contribs) m |
||
| (4 intermediate revisions by the same user not shown) | |||
| Line 1: | Line 1: | ||
__NOTOC__ | __NOTOC__ | ||
| − | + | I received my Master's degree in Electronic Engineering from the University of Bologna in 2020. I am currently pursuing a PhD at the Integrated Systems Laboratory (IIS) of ETH Zurich in the Digital Systems group led by Prof. Luca Benini. My research is mainly focused on hardware accelerators, heterogeneous architectures and computer arithmetic. | |
| + | |||
| + | |||
| + | [[File:lbertaccini_photo.jpg|thumb|200px|]] | ||
| + | |||
| + | ==Interests== | ||
| + | My research interests include: | ||
| + | * Hardware accelerators (Floating-Point Unit, DSP/ML accelerators) | ||
| + | * Manycore systems | ||
| + | * Energy-Efficient SoCs | ||
| + | * Heterogenous architecures | ||
==Luca Bertaccini -- Contact Information== | ==Luca Bertaccini -- Contact Information== | ||
| Line 9: | Line 19: | ||
[[Category:Digital]] | [[Category:Digital]] | ||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
===Available Projects=== | ===Available Projects=== | ||
Latest revision as of 11:59, 7 November 2022
I received my Master's degree in Electronic Engineering from the University of Bologna in 2020. I am currently pursuing a PhD at the Integrated Systems Laboratory (IIS) of ETH Zurich in the Digital Systems group led by Prof. Luca Benini. My research is mainly focused on hardware accelerators, heterogeneous architectures and computer arithmetic.
Interests
My research interests include:
- Hardware accelerators (Floating-Point Unit, DSP/ML accelerators)
- Manycore systems
- Energy-Efficient SoCs
- Heterogenous architecures
Luca Bertaccini -- Contact Information
- Office: ETZ J 78
- e-mail: lbertaccini@iis.ee.ethz.ch
- www: IIS Homepage
Available Projects
- Extending our FPU with Internal High-Precision Accumulation (M)
- Hardware Exploration of Shared-Exponent MiniFloats (M)
Projects in Progress
Completed Projects
- Integrating an Open-Source Double-Precision Floating-Point DivSqrt Unit into CVFPU (1S)
- Investigating the Cost of Special-Case Handling in Low-Precision Floating-Point Dot Product Units (1S)
- Smart Meters
- Optimizing the Pipeline in our Floating Point Architectures (1S)
- Investigation of the high-performance multi-threaded OoO IBM A2O Core (1-3S)
