Difference between revisions of "User:Lbertaccini"
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| + | I received my Master's degree in Electronic Engineering from the University of Bologna in 2020. I am currently pursuing a PhD at the Integrated Systems Laboratory (IIS) of ETH Zurich in the Digital Systems group led by Prof. Luca Benini. My research is mainly focused on hardware accelerators and heterogeneous architectures | ||
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| + | [[File:lbertaccini_photo.jpg|thumb|200px|]] | ||
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| + | ==Interests== | ||
| + | My research interests include: | ||
| + | * Hardware accelerators (Floating-Point Unit, FFT accelerators, ML accelerators) | ||
| + | * Manycore systems | ||
| + | * Energy-Efficient SoCs | ||
| + | * Heterogenous architecures | ||
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==Luca Bertaccini -- Contact Information== | ==Luca Bertaccini -- Contact Information== | ||
* '''Office''': ETZ J 78 | * '''Office''': ETZ J 78 | ||
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| − | ==Available Projects== | + | ===Available Projects=== |
<DynamicPageList> | <DynamicPageList> | ||
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category = Available | category = Available | ||
category = Lbertaccini | category = Lbertaccini | ||
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Revision as of 12:23, 19 November 2021
I received my Master's degree in Electronic Engineering from the University of Bologna in 2020. I am currently pursuing a PhD at the Integrated Systems Laboratory (IIS) of ETH Zurich in the Digital Systems group led by Prof. Luca Benini. My research is mainly focused on hardware accelerators and heterogeneous architectures
Interests
My research interests include:
- Hardware accelerators (Floating-Point Unit, FFT accelerators, ML accelerators)
- Manycore systems
- Energy-Efficient SoCs
- Heterogenous architecures
Luca Bertaccini -- Contact Information
- Office: ETZ J 78
- e-mail: lbertaccini@iis.ee.ethz.ch
- www: IIS Homepage
Available Projects
- Extending our FPU with Internal High-Precision Accumulation (M)
- Hardware Exploration of Shared-Exponent MiniFloats (M)
Projects in Progress
Completed Projects
- Integrating an Open-Source Double-Precision Floating-Point DivSqrt Unit into CVFPU (1S)
- Investigating the Cost of Special-Case Handling in Low-Precision Floating-Point Dot Product Units (1S)
- Smart Meters
- Optimizing the Pipeline in our Floating Point Architectures (1S)
- Investigation of the high-performance multi-threaded OoO IBM A2O Core (1-3S)
