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I received my Master's degree in Electronic Engineering from the University of Bologna in 2020. I am currently pursuing a PhD at the Integrated Systems Laboratory (IIS) of ETH Zurich in the Digital Systems group led by Prof. Luca Benini. My research interests include:
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I received my Master's degree in Electronic Engineering from the University of Bologna in 2020. I am currently pursuing a PhD at the Integrated Systems Laboratory (IIS) of ETH Zurich in the Digital Systems group led by Prof. Luca Benini. My research is mainly focused on hardware accelerators and heterogeneous architectures
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[[File:lbertaccini_photo.jpg|thumb|200px|]]
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==Interests==
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My research interests include:
 
* Hardware accelerators (Floating-Point Unit, FFT accelerators, ML accelerators)
 
* Hardware accelerators (Floating-Point Unit, FFT accelerators, ML accelerators)
 
* Manycore systems
 
* Manycore systems
 
* Energy-Efficient SoCs  
 
* Energy-Efficient SoCs  
 
* Heterogenous architecures
 
* Heterogenous architecures
 
 
[[File:lbertaccini_photo.jpg|thumb|200px|]]
 
  
 
==Luca Bertaccini -- Contact Information==
 
==Luca Bertaccini -- Contact Information==
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[[Category:Digital]]
 
[[Category:Digital]]
  
==Interests==
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* Hardware Acceleration
 
* Digital ASIC Design
 
* Low-Power Design
 
  
 
===Available Projects===
 
===Available Projects===

Revision as of 11:23, 19 November 2021

I received my Master's degree in Electronic Engineering from the University of Bologna in 2020. I am currently pursuing a PhD at the Integrated Systems Laboratory (IIS) of ETH Zurich in the Digital Systems group led by Prof. Luca Benini. My research is mainly focused on hardware accelerators and heterogeneous architectures


Lbertaccini photo.jpg

Interests

My research interests include:

  • Hardware accelerators (Floating-Point Unit, FFT accelerators, ML accelerators)
  • Manycore systems
  • Energy-Efficient SoCs
  • Heterogenous architecures

Luca Bertaccini -- Contact Information


Available Projects


Projects in Progress


Completed Projects