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User:Lbertaccini

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I received my Master's degree in Electronic Engineering from the University of Bologna in 2020. I am currently pursuing a PhD at the Integrated Systems Laboratory (IIS) of ETH Zurich in the Digital Systems group led by Prof. Luca Benini. My research interests include:

  • Hardware accelerators (Floating-Point Unit, FFT accelerators, ML accelerators)
  • Manycore systems
  • Energy-Efficient SoCs
  • Heterogenous architecures


Lbertaccini photo.jpg

Luca Bertaccini -- Contact Information

Interests

  • Hardware Acceleration
  • Digital ASIC Design
  • Low-Power Design

Available Projects


Projects in Progress

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Completed Projects