Difference between revisions of "User:Lukasc"
From iis-projects
(Created page with "==Lukas Cavigelli== ==Interests== * Computer Vision * Machine Learning, Neural Networks * FPGA & Digital ASIC Design * C/C++/CUDA software development * Embedded systems ==C...") |
|||
Line 1: | Line 1: | ||
− | ==Lukas Cavigelli== | + | |
+ | |||
+ | ==Lukas Cavigelli -- Contact Information== | ||
+ | * '''Office''': ETZ J 68.2 | ||
+ | * '''e-mail''': [mailto:cavigelli@iis.ee.ethz.ch cavigelli@iis.ee.ethz.ch] | ||
+ | * '''phone''': (+41 44 63) 384 17 | ||
+ | * '''www''': [http://www.iis.ee.ethz.ch/portrait/staff/lukasc.en.html IIS Homepage] | ||
+ | [[Category:Supervisors]] | ||
+ | [[Category:Digital]] | ||
==Interests== | ==Interests== | ||
Line 8: | Line 16: | ||
* Embedded systems | * Embedded systems | ||
− | == | + | ==Available Projects== |
− | + | <DynamicPageList> | |
− | + | supresserrors = true | |
− | + | category = Available | |
− | + | category = Phager | |
− | + | </DynamicPageList> | |
− | + | == Projects in Progress== | |
+ | <DynamicPageList> | ||
+ | supresserrors = true | ||
+ | category = In progress | ||
+ | category = Phager | ||
+ | </DynamicPageList> | ||
+ | ==Completed Projects== | ||
+ | <DynamicPageList> | ||
+ | supresserrors = true | ||
+ | category = Completed | ||
+ | category = Phager | ||
+ | </DynamicPageList> |
Revision as of 19:43, 24 March 2015
Contents
Lukas Cavigelli -- Contact Information
- Office: ETZ J 68.2
- e-mail: cavigelli@iis.ee.ethz.ch
- phone: (+41 44 63) 384 17
- www: IIS Homepage
Interests
- Computer Vision
- Machine Learning, Neural Networks
- FPGA & Digital ASIC Design
- C/C++/CUDA software development
- Embedded systems
Available Projects
No pages meet these criteria.
Projects in Progress
No pages meet these criteria.
Completed Projects
- LightProbe - WIFI extension (PCB)
- Intelligent Power Management Unit (iPMU)
- Ultrafast Medical Ultrasound imaging on a GPU
- LightProbe - Implementation of compressed-sensing algorithms
- Implementing Hibernation on the ARM Cortex M0
- Hardware/software co-programming on the Parallella platform
- Efficient Digital Signal Processing in High-Channel-Count High-Frame-Rate 3D Ultrasound Imaging Systems