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VLSI Implementation of a Systolic Array for LMMSE Detection in mmWave Massive MIMO-OFDM

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A high-level architecture of systolic array for LMMSE detection

Short Description

Millimeter wave (mmWave) and massive multiple-input multiple-output (MIMO) are key technologies in 5G and beyond 5G wireless communication systems. While mmWave provides vast unused spectrum to increase the communication bandwidth, massive MIMO improves the power and spectral efficiencies via high array gain and spatial multiplexing. For massive MIMO, the performance of linear data detectors, such as linear minimum mean square error (LMMSE) equalization, is near-optimal when the ratio of number of base station antennas to user antennas is large. However, the hardware implementation of even simple linear detectors, including LMMSE, is challenging due to the large matrix inversion and multiplications. In addition, orthogonal frequency-division multiplexing (OFDM), which is the main modulation scheme specified in 5G new radio (NR), complicates baseband processing even further.

In recent years, there has been a large body of research dedicated to efficient hardware implementations of data detectors for massive MIMO [1,2,3]. However, most of the research has focused on implementing the detector for only one or a few subcarriers, avoiding the complexities of the full baseband receiver for all subcarriers of OFDM systems. In addition, the idea of integrating the ADCs into a single mixed-signal chip [4] that takes the down-converted analog signals from the antennas and produces the symbol estimates, necessitates implementing all blocks of the receiver including synchronization, OFDM FFTs, and data detection for all subcarriers on one chip.

In this project, we will focus on efficient implementation of an LMMSE detector for mmWave massive MIMO-OFDM. To achieve high hardware efficiency, we aim at implementing a systolic array that performs all steps of LMMSE equalization, including Gram matrix computation, Cholesky decomposition and forward and backward substitution [5]. This architecture, not only reuses the same processing elements (PEs) to do all steps of the detection, but also enables the storage of the elements of the Gram matrix locally inside the PEs to avoid communication with a separate memory module, and hence achieves great area and power efficiency. To further reduce the power consumption of the detector, we will perform the detection tasks in the beamspace domain and mute multiplications whenever one operand is zero or both operands are blow a certain threshold [6,7]. Through MATLAB simulations with realistic channels generated by QuadRiGa [8] or from a commercial ray-tracing simulator, we will explore system-level aspects such as the possibility of reusing the equalization matrix across several subcarriers to further reduce the area of the full baseband receiver.

Possible extensions of the project include investigating the feasibility of reducing the required number of OFDM FFTs after the beamspace transform, which can lead to significant reduction in the chip area and power consumption.

[1] M. Wu, B. Yin, G. Wang, C. Dick, J. R. Cavallaro, and C. Studer, “Large-scale MIMO detection for 3GPP LTE: Algorithms and FPGA implementations,” IEEE J. Sel. Topics Signal Process., vol. 8, no. 5, pp. 916–929, Oct. 2014.

[2] L. Liu, G. Peng, P. Wang, S. Zhou, Q. Wei, S. Yin, and S. Wei, “Energyand area-efficient recursive-conjugate-gradient-based MMSE detector for massive MIMO systems,” IEEE Trans. Signal Process., vol. 68, pp. 573–588, Jan. 2020

[3] X. Tan, J. Jin, K. Sun, Y. Xu, M. Li, Y. Zhang, Z. Zhang, X. You, and C. Zhang, “Enhanced linear iterative detector for massive multiuser MIMO uplink,” IEEE Trans. Circuits Syst. I, vol. 67, no. 2, pp. 540–552, Feb. 2020

[4] O. Castañeda et al., "Resolution-Adaptive All-Digital Spatial Equalization for mmWave Massive MU-MIMO," 2021 IEEE 22nd International Workshop on Signal Processing Advances in Wireless Communications (SPAWC), 2021

[5] M. Mahdavi, O. Edfors, V. Öwall and L. Liu, "Angular-Domain Massive MIMO Detection: Algorithm, Implementation, and Design Tradeoffs," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 67, no. 6, pp. 1948-1961, June 2020

[6] S. H. Mirfarshbafan and C. Studer, "SPADE: Sparsity-Adaptive Equalization for MMwave Massive MU-MIMO," IEEE Statistical Signal Processing Workshop (SSP), 2021

[7] S. H. Mirfarshbafan, A. Gallyas-Sanhueza, R. Ghods and C. Studer, "Beamspace Channel Estimation for Massive MIMO mmWave Systems: Algorithm and VLSI Design," IEEE Transactions on Circuits and Systems I, Dec. 2020

[8] S. Jaeckel, L. Raschkowski, K. Börner, L. Thiele, F. Burkhardt, and E. Eberlein, “QuaDRiGa - quasi deterministic radio channel generator user manual and documentation,” Fraunhofer Heinrich Hertz Institute, Tech. Rep. v2.0.0, Aug. 2017

Status: Available

Semester or master project for 1-2 students
Contact: Seyed Hadi Mirfarshbafan


Verilog or VHDL
Communication Systems (or a similar course)


50% VLSI implementation
30% MATLAB simulation
20% Literature search


Christoph Studer


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