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• Vector-based Manycore HPC Cluster Exploration for 5G Communication Algorithm (1-2M)
  ...he TeraPool architecture as our hardware platform, a scaled-up system from MemPool [[#ref-Cavalcante2020|[2]]], which has 1024 Snitch cores and 4096 b ...ligning the accelerator interface between the latest 64-bit Spatz Cluster, MemPool, and TeraPool-based Spatz.
  6 KB (844 words) - 11:41, 31 October 2023
• Fast Simulation of Manycore Systems (1S)
  ...most five cycles. Therefore, all cores can efficiently communicate, making MemPool suitable for various workloads and easy to program. ...be explored. Furthermore, the problem is only becoming worse when scaling MemPool even further to thousands of cores.
  10 KB (1,434 words) - 17:20, 2 August 2021
• Advanced Physical Design: Reinforcement Learning for Macro Placement and Mix-Placer (B/1-2S)
  For the MemPool/TeraPool project, managing the floorplan becomes a formidable challenge, es ...e most suitable approach for our many-core based HPC cluster, encompassing MemPool and TeraPool. Here’s a comprehensive guide to assist in evaluating and co
  4 KB (530 words) - 10:50, 3 November 2023
• Transforming MemPool into a CGRA (M)
  <!-- Transforming MemPool into a CGRA (M) --> [[Category:MemPool]]
  13 KB (1,887 words) - 15:51, 17 November 2021
• Implementing DSP Instructions in Banshee (1S)
  ...ing MemPool suitable for various workloads and easy to program. To improve MemPool’s performance, we have recently added a custom ISA extension with special * '''Implement MemPool’s instructions in Banshee'''
  10 KB (1,428 words) - 13:31, 27 October 2022
• Towards a High-performance Open-source Verification Suite for AXI-based Systems (M/1-3S/B)
  ...igh-performance scientific computing and machine-learning systems (Occamy, Mempool) simulation time increased massively making it in many cases even impossibl
  2 KB (290 words) - 09:38, 3 November 2023
• PULP
  ...2024/Heartstream.html Heartstream] 64-core RISC-V based building block for Mempool/Terapool * [http://asic.ethz.ch/2021/Minpool.html Minpool] Smaller scale Mempool implementation with 16 Snitch cores
  11 KB (1,649 words) - 15:34, 30 May 2024
• Streaming Integer Extensions for Snitch (M/1-2S)
  .../main/hardware/deps/snitch/src/snitch_ipu.sv Snitch IPU accelerator in the MemPool many-core system] (GitHub repository)
  6 KB (770 words) - 14:19, 15 September 2022
• Efficient Synchronization of Manycore Systems (M/1S)
  ...her system components as well. The extended ATUN has to be integrated into MemPool, our manycore system that can boast up to 256 cores.
  12 KB (1,864 words) - 12:08, 29 August 2022

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