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  • [[Category:In progress]] == Status: In-Progress ==
    3 KB (470 words) - 11:34, 3 November 2023
  • [[Category:In Progress]] == Status: In Progress ==
    3 KB (460 words) - 15:29, 19 February 2024
  • ...rk synchronization rely on performing a large number of cross-correlations in real-time. Due to the large throughput requirements, large accelerators are ...cross-correlations. Using this knowledge, you will develop the accelerator in VHDL, or using High-Level Synthesis (HLS). It should be able to meet the th
    3 KB (421 words) - 09:38, 14 September 2018
  • ==Selected Projects in Progress== ''For a complete list, see [[:Category:In progress|Projects in Progress]].''
    5 KB (540 words) - 12:31, 8 May 2024
  • ...umber of metal/oxide pairs and analyze them regarding their applicability in CBRAM applications ...group has developed a model in COMSOL to simulate ON/OFF switching in CBRAM. So far, the model depends on a number of free input parameters, amon
    3 KB (448 words) - 17:11, 16 September 2021
  • ...plementation, or purely VLSI implementation based. The tools to be learned in this project are numerical (convex) optimization and deep unfolding, a rece : For students interested in the theory: Communication Systems (''recommended'')
    4 KB (513 words) - 14:16, 24 November 2021
  • [[Category:In progress]] == Status: In progress ==
    3 KB (483 words) - 15:28, 19 February 2024
  • <!-- Runtime partitioning of L1 memory in Mempool (M) --> [[Category:In progress]]
    3 KB (490 words) - 10:38, 2 November 2023
  • ...novel method developed in our group to reduce the complexity of inference in a network. ===Status: In Progress ===
    4 KB (520 words) - 14:52, 24 November 2021
  • ...pa.phys.ethz.ch/ Physics Department of ETH Zurich]. If you are experienced in FPGA programming (VHDL) and want to spice up your knowledge with a real wor ...ssues a signal for data taking or not). The Xilinx AC701 Development Board in combination with a recently designed and build interface board (see picture
    4 KB (460 words) - 21:42, 30 January 2018
  • ...ower-Graph-1024x659.jpg|600px|thumb|LTE Cat-M1 Power Consumption over time in discontinuous reception [1].]] ...hey only receive at certain pre-defined moments (paging occasions) and are in stand-by most of the time. The range between these moments can range from m
    3 KB (346 words) - 14:04, 11 January 2021
  • ...portant as a high-efficiency is controllability: lowest energy consumption in VLSI chips requires several dynamically adaptable voltages: # Unused units need to be fully shut down due to the leakage present even in absence of clock and signal transitions.
    3 KB (438 words) - 18:06, 3 February 2015
  • ...akes it particularly challenging, however, is its susceptibility to errors in the recognition of human intentions. Indeed, the recent success of deep lea ===Status: In Progress ===
    3 KB (372 words) - 20:22, 1 April 2019
  • ...ring ON-OFF switching processes. In FETs, the major difficulty to overcome in order to minimize their power consumption is the value of their inverse sub ===Status: In Progress ===
    3 KB (449 words) - 15:37, 4 September 2019
  • ...sparse matrices are unstructured. Therefore, using these libraries results in sub-optimal performance and/or much higher memory usage than necessary comp ===Status: In Progress ===
    3 KB (446 words) - 15:56, 1 May 2023
  • : Interest in wireless communications : Knowledge in Matlab, C and/or VHDL is of advantage
    3 KB (449 words) - 12:12, 4 November 2019
  • In the latest years model predictive controller has been successfully applied ...ion enabling the use of model predictive control in a real case scenario. In addition to that thermal evolution of multicore platforms are characterized
    3 KB (456 words) - 08:35, 20 January 2021
  • ...or driven by a posititive to absolute temperature (PTAT) current to result in a temperature independent voltage of about 1.2V. Such a voltage is not comp ...they create an intrinsic voltage ripple that has to be heavily suppressed in the case of a reference.
    4 KB (471 words) - 11:13, 3 May 2018
  • ...ch means the high purity frequency carriers are required to be synthesized in the range from 15 GHz to even 60 GHz. ...n in the figure above, there are quite many smart architectures introduced in recent years, such as injection-locking (ILPLL) and subsampling (SSPLL). Al
    4 KB (514 words) - 15:51, 20 August 2021
  • ...akes it particularly challenging, however, is its susceptibility to errors in the recognition of human intentions. To cope with high variability of EEG d ...While being successful in image classification, CNNs are gaining attention in MI-BCIs as well [2]. One of the most popular and compact CNNs is EEGNet [3]
    3 KB (372 words) - 11:09, 21 July 2020

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