...n a limited power budget require a novel approach across the entire stack, system-level design, and optimization.
...red offchip]] [[File:DistributedOnSensor.png|500px|thumb|right|Distributed System -> Only Region of Interest section of image is transferred offchip]]
4 KB (577 words) - 18:28, 4 October 2023
...al-world handset operations in the wide-band code-division multiple-access system. Large-frequency and clock errors are induced at initial search due to an i
2 KB (340 words) - 10:39, 6 November 2017
...egrity. The end goal is to deploy these models into a real-time monitoring system capable of issuing alerts to maintenance teams, thus facilitating prompt an
3 KB (465 words) - 11:47, 14 May 2024
...on of your project will be the development of a sophisticated notification system designed to automatically alert both local authorities and the public about
* '''Automated Warning System:''' Develop a notification system that automatically alerts local authorities and the public of potential dan
4 KB (531 words) - 17:09, 16 May 2024
#REDIRECT [[WCDMA/HSPA+ Synchronization System Design, Implementation, and Testing]]
84 bytes (9 words) - 15:33, 1 December 2016
...his project we would like to develop a concrete proof of concept low power System-on-Chip where (small) practical applications such as Spiking Convolutional
...connected. With regard to this, a higher-level synaptic array for the full System-on-Chip must be designed, taking into account even more strict area constra
7 KB (1,000 words) - 12:22, 13 January 2017
#REDIRECT [[PULP in space - Fault Tolerant PULP System for Critical Space Applications]]
88 bytes (13 words) - 13:10, 9 August 2019
...t role in this type of devices and in general in battery-operated embedded system.
: Interest in Computer Architectures at system level
2 KB (342 words) - 16:46, 11 February 2015
...ock diagram, which involves both the programming of a Low power FPGA and a System on Chip with ARM cortex-M4F and Bluetooth low energy 5.0. The project is qu
* Motivation to build and test a real system
4 KB (526 words) - 15:48, 10 November 2020
...hanism both for sub-systems on the chip level as well as components on the system level, e.g. flash memory or radio ICs. This project focuses on chip-level d
...dictates battery size, the most critical factor in any volume-constrained system.
4 KB (597 words) - 16:57, 12 July 2022
[[File:origami-fpga-system.png|400px|thumb]]
...o finish the processing pipeline (activation, pooling), and completing the system by connecting a camera or loading a video stream and displaying the results
3 KB (397 words) - 18:17, 29 August 2016
..., televisions, pc among others. The main goal is to achieve an intelligent system that process the data from one or more sensors to understand the context an
...classification accuracy and energy efficiency and to further optimize the system.
5 KB (669 words) - 17:22, 31 January 2018
...n technique is to combine multiple instances of a core to a ''multi-core'' system. This technique introduces a new challenge: Each core keeps its own copy of
...ane cores. Throughout this project, the feasibility and performance of the system shall be evaluated.
2 KB (260 words) - 16:41, 15 November 2022
..., non-invasive method to measure kidney performance via an external sensor system to avoid the use of urinary catheters for this subgroup of patients, thereb
...classification accuracy, and energy efficiency and to further optimize the system. The work includes the modeling and design of a suited impedance sensor, it
6 KB (857 words) - 15:37, 10 November 2020
-
2 KB (245 words) - 10:39, 6 November 2017
<!-- Peripheral Event Linking System For Real-Time Capable Energy-Efficient SoCs (M/1-2S) -->
...unities are limited due to the necessity to retain major parts of the main system memory due to the use of static random access memory (SRAM) for code execut
8 KB (1,127 words) - 19:54, 1 March 2023
...he student he can be involved on the design of the IC, the layout, or at a system and application levler. The wake-up receiver should achieves power consumpt
...classification accuracy and energy efficiency and to further optimize the system.
5 KB (686 words) - 11:54, 2 February 2018
-
0 bytes (0 words) - 12:48, 2 November 2020
#REDIRECT [[System Analysis and VLSI Design of LTE NB-IoT Baseband Processing]]
79 bytes (11 words) - 09:49, 19 October 2016
-
0 bytes (0 words) - 12:16, 2 November 2020
#REDIRECT [[Physical Implementation of MemPool, PULP's Manycore System (1M/1-2S)]]
82 bytes (11 words) - 17:40, 2 November 2020
Now, we want to equip the system with a 192 element sensor to achieve better image quality (resolution, cont
...and electrical constraints to be properly be intergated with the existing system.
2 KB (263 words) - 20:47, 12 November 2020
#REDIRECT [[PULP in space - Fault Tolerant PULP System for Critical Space Applications]]
88 bytes (13 words) - 13:10, 9 August 2019
...stem was proposed alongside the release-8 of the Long Term Evolution (LTE) system for the fourth generation (4G) of mobile communication. While the air inter
...tionality of a standard-compliant physical layer of a mobile communication system. Possibly, the student can also investigate and analyze an interesting perf
1 KB (159 words) - 11:16, 23 September 2016
<!-- AXI-based Network on Chip (NoC) system -->
...ould be to build a system with a mesh NoC and a couple of cores and do the system integration for a potential tapeout. For the verification, low-level softwa
2 KB (252 words) - 14:43, 23 October 2023
...ilog code, is the '''emacs''' editor, as it has a really advanced VHDL and System Verilog mode. Because of this, you should get comfortable with the idea of
841 bytes (137 words) - 14:42, 16 January 2014
...will be able to control the accelerator from the command line of the Linux system.
:[3] [http://www.arm.com/products/system-ip/amba/amba-open-specifications.php ARM AMBA Specification]
2 KB (236 words) - 09:46, 12 October 2017
...and not in the chips that we designed ourselves, rendering many low-level system management jobs challenging and cumbersome. In this project, you will exten
*Some experience with hardware design (VHDL/(System-)Verilog), for example completion of VLSI I lecture
2 KB (240 words) - 16:57, 12 July 2022
...ludes them from being used in a portable system. Furthermore, surveillance system typically do not come with any localized intelligence, so their recorded da
In this project, a novel, distributed and energy-efficient surveillance system will be brought up and optimized by the student.
3 KB (433 words) - 15:36, 4 August 2022
Epilepsy is a central nervous system disorder in which brain activity becomes abnormal, causing seizures or peri
...implementing a self-aware machine learning model to be used in a wearable system for real-time detection of epileptic seizures.
2 KB (298 words) - 15:25, 23 October 2023
...ical instant''' at which these results are produced. In fact, a real-time system changes its state as a function of physical time.
...controlled object'' (the ''controlled cluster''), the ''real-time computer system'' (the ''computational cluster'') and the ''human operator'' (the ''operato
4 KB (518 words) - 09:54, 10 January 2022
Ultra Low Power System on a Chip (UlpSoC) is the flagship project at the IIS that aims to design e
8 members (0 subcategories, 0 files) - 19:42, 16 January 2014
...Thus, wireless transmission of non-relevant information makes the overall system inefficient.
...result in power saving, and thus increased operation time of the wearable system.
3 KB (364 words) - 18:42, 6 December 2023
...logy of Stockholm in 2022 and pursuing a Ph.D. in the Digital Circuits and System group of Luca Benini.
* Memory System
1,021 bytes (116 words) - 16:17, 6 November 2022
[[File:Ultralight.jpg|thumb|400px|Current Prototype System]]
* Programming of software functions: Microcontroller Programming / Processing system programming (C/C++/CUDA)
2 KB (254 words) - 14:14, 31 October 2020
...d data compression. The project will require simulation and testing of the system to verify its performance, power consumption, and compatibility with differ
* Experience with System Verilog or Verilog, VLSI 1
2 KB (250 words) - 18:21, 20 February 2023
...n technique is to combine multiple instances of a core to a ''multi-core'' system. This technique introduces a new challenge: Each core keeps its own copy of
...ane cores. Throughout this project, the feasibility and performance of the system shall be evaluated.
2 KB (260 words) - 16:41, 15 November 2022
* Understand the different available peripherals on your system board
* Run your system on the development board and collect the results.
1,020 bytes (132 words) - 19:50, 10 February 2015
...method by implementing our system.. Measurements on the performance of the system will be performed from the students in order to evaluate the distance, powe
: Interest in Computer Architectures at system level
3 KB (378 words) - 19:56, 9 February 2015
[[File:iPMU.png|600px|thumb|right|iPMU within a Generalized System]]
...ilable energy for the system and learn the energy consumption of different system tasks. Moreover, the iPMU should profile the available power input from the
2 KB (292 words) - 11:40, 2 June 2021
