User contributions
From iis-projects
- 13:02, 10 March 2015 diff hist +21 High Performance Cellular Receivers in Very Advanced CMOS current
- 13:01, 10 March 2015 diff hist +567 N Benjamin Sporrer Created page with "==Available Projects== <DynamicPageList> supresserrors = true category = Available category = Sporrerb </DynamicPageList> ==Projects in Progress== <DynamicPageList> supresserr..." current
- 12:58, 10 March 2015 diff hist +30 N User:Sporrerb Redirected page to Benjamin Sporrer current
- 12:53, 10 March 2015 diff hist +20 Harald Kröll
- 12:52, 10 March 2015 diff hist +20 Karim Badawi
- 10:55, 10 March 2015 diff hist +23 Android Software Design
- 10:55, 10 March 2015 diff hist +30 N Category:Schoenle Redirected page to Philipp Schönle current
- 10:54, 10 March 2015 diff hist +1 Wireless Biomedical Signal Acquisition Device current
- 10:54, 10 March 2015 diff hist -1 Wireless Biomedical Signal Acquisition Device
- 10:53, 10 March 2015 diff hist +22 Wireless Biomedical Signal Acquisition Device
- 10:53, 10 March 2015 diff hist +22 Flexible Front-End Circuit for Biomedical Data Acquisition current
- 10:52, 10 March 2015 diff hist +569 N Philipp Schönle Created page with "==Available Projects== <DynamicPageList> supresserrors = true category = Available category = Schoenle </DynamicPageList> ==Projects in Progress== <DynamicPageList> supresserr..." current
- 10:49, 10 March 2015 diff hist +30 N User:Schoenle Redirected page to Philipp Schönle current
- 10:38, 10 March 2015 diff hist +607 Benjamin Weber
- 13:39, 3 March 2015 diff hist -94 Design and VLSI Implementation of a Constrained-Viterbi Algorithm Equalizer for 3GPP TD-HSPA
- 13:38, 3 March 2015 diff hist -1,022 4th Generation Synchronization
- 13:37, 3 March 2015 diff hist -1,021 Baseband Meets CPU
- 13:36, 3 March 2015 diff hist -1,020 Time and Frequency Synchronization in LTE Cat-0 Devices
- 13:36, 3 March 2015 diff hist -1,022 Synchronisation and Cyclic Prefix Handling For LTE Testbed
- 13:35, 3 March 2015 diff hist +67 N File:LEG-CVA-detector.png A high level block diagram of a receiver with the LEG-CVA detector. current
- 13:32, 3 March 2015 diff hist +96 N First ASIC Realization For A New HSPA/HSPA+ Detector Weberbe moved page First ASIC Realization For A New HSPA/HSPA+ Detector to Design and VLSI Implementation of a Constrained-Viterbi Algorithm for 3GPP TD-HSPA: changed project name current
- 13:32, 3 March 2015 diff hist 0 m Design and VLSI Implementation of a Constrained-Viterbi Algorithm Equalizer for 3GPP TD-HSPA Weberbe moved page First ASIC Realization For A New HSPA/HSPA+ Detector to Design and VLSI Implementation of a Constrained-Viterbi Algorithm for 3GPP TD-HSPA: changed project name
- 13:31, 3 March 2015 diff hist +1,737 Design and VLSI Implementation of a Constrained-Viterbi Algorithm Equalizer for 3GPP TD-HSPA
- 18:57, 20 February 2015 diff hist +97 N File:TinyIot.png Small footprint and low power nodes are indispensable for the billion devices Internet-of-Things. current
- 18:56, 20 February 2015 diff hist +2,669 N Synchronisation and Cyclic Prefix Handling For LTE Testbed Created page with "thumb|Small footprint and low power nodes are indispensable for the billion devices Internet-of-Things. ==Introduction== By the end of the decade billion..."
- 16:23, 18 February 2015 diff hist -452 Category:Research Redirected page to Research current
- 16:23, 18 February 2015 diff hist +685 N Research Created page with "Research projects at the Integrated Systems Laboratory (IIS). ==2015== <DynamicPageList> suppresserrors = true category = 2015 category = Research </DynamicPageList> ==2014== ..."
- 16:20, 18 February 2015 diff hist -1 Benjamin Weber
- 13:56, 18 February 2015 diff hist -1 Norbert Felber current
- 10:25, 18 February 2015 diff hist +8 Baseband Meets CPU
- 10:14, 18 February 2015 diff hist 0 Baseband Meets CPU →Project Description
- 10:10, 18 February 2015 diff hist +4 Baseband Meets CPU →Project Description
- 10:09, 18 February 2015 diff hist +4 Baseband Meets CPU →Project Description
- 10:06, 18 February 2015 diff hist +6 Interference Cancellation for Evolved EDGE on the RazorEDGE baseband ASIC current
- 10:04, 18 February 2015 diff hist +3 Soft-Output Viterbi Equalizer as part of Evolved EDGE baseband ASIC current
- 10:01, 18 February 2015 diff hist 0 Soft-Output Viterbi Equalizer as part of Evolved EDGE baseband ASIC →Links
- 20:18, 17 February 2015 diff hist -11 Synchronization and Power Control Concepts for 3GPP TD-SCDMA
- 20:15, 17 February 2015 diff hist +1 Category:Phager Redirected page to Pascal Hager current
- 20:14, 17 February 2015 diff hist -533 User:Phager Redirected page to Pascal Hager current
- 20:14, 17 February 2015 diff hist +648 N Pascal Hager Created page with "==Available Projects== <DynamicPageList> supresserrors = true category = Available category = Phager </DynamicPageList> == Projects in Progress== <DynamicPageList> supresserro..."
- 20:12, 17 February 2015 diff hist -2,274 Benjamin Weber
- 20:10, 17 February 2015 diff hist +20 Efficient Digital Signal Processing in High-Channel-Count High-Frame-Rate 3D Ultrasound Imaging Systems current
- 20:09, 17 February 2015 diff hist +20 Hardware/software co-programming on the Parallella platform
- 20:08, 17 February 2015 diff hist +25 N Category:Phager Redirected page to User:Phager
- 20:06, 17 February 2015 diff hist +20 Audio DAC Conversion Jitter Measurement System current
- 20:06, 17 February 2015 diff hist +20 Hybrid Analog/Digital Leveling Loop for Very-Low-Distortion Oscillator current
- 20:06, 17 February 2015 diff hist +37 Quantum Key Secured 100 Gbit/s Payload Encryption and its High-Speed Network Interfaces current
- 20:04, 17 February 2015 diff hist +19 Power Optimization in Multipliers
- 20:03, 17 February 2015 diff hist +898 N Norbert Felber Created page with "==Interests== * Digital design, design flows, ASIC design * Full custom digital design, standard cells * Computer architecture, microprocessors * Cryptographic hardware * Asyn..."
- 20:01, 17 February 2015 diff hist -483 User:Felber Redirected page to Norbert Felber current