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  • ...cessing unit that is not worn directly on the head. This must then be done in a way which the data is transmitted with short delay to the processing unit ...iable EEG signals during motion, transmitting them wirelessly with BioWolf in real time. An on-board accelerometer will empower the student to perform se
    3 KB (369 words) - 15:04, 20 July 2023
  • shared-memory cluster realized in 28nm SOI technology. In this project, you By doing this project, you will gain experience in designing strategies for
    3 KB (409 words) - 10:52, 27 March 2014
  • [[File:Computation of Phonon Bandstructure in III-V Nanostructures.png|280px|thumb]] ...ld's summation method in bulk structures, it is not clear how to handle it in nanostructures without too much increasing the computational burden.
    3 KB (363 words) - 15:37, 4 September 2019
  • ...tor by using a distance metric. When the dimensionality of hypervectors is in the thousands (e.g.,100,000 bits), an efficient search operation is challen ...l would be to design an efficient and general module for search operations in HD computing. You would develop RTL implementation with FPGA prototyping.
    3 KB (366 words) - 15:39, 10 November 2020
  • ...mulations on the already obtained data. The student should have experience in computer programming (preferentially image processing or distributed comput ===Status: In Progress ===
    3 KB (472 words) - 12:12, 17 January 2014
  • ...o access data from the image sensors. The main part of the project will be in designing the pre-processing stage which will perform a set of filtering an : Interest in video processing and machine learning
    3 KB (357 words) - 18:53, 6 December 2014
  • ...oss-correlations, which is one of the most computationally expensive tasks in an IoT modem. Recently, a new kind of synchronization waveforms has been pr ...oject you will look at the proposal in detail and evaluate its performance in comparison to state-of-the-art solutions. For this you can use our existing
    3 KB (358 words) - 10:51, 5 April 2022
  • As part of our research activities we regularly tape-out PULP based SoC in various sizes, from smaller student tape-outs incorporating novel hardware ===Projects In Progress===
    3 KB (339 words) - 15:59, 1 November 2023
  • ...le:Apple_heterogeneous_integration.png|700px|thumb|center|Uniting many ICs in a single one: Heterogeneous integration has allowed (not only) Apple to get ...currently one of the main drivers for performance-per-energy advancements in various application domains.
    3 KB (421 words) - 18:41, 28 October 2020
  • category = In progress
    343 bytes (35 words) - 20:25, 25 October 2019
  • ...t task. Another class of neural networks which achieved impressive results in visual tasks is the Convolutional Neural Networks (CNNs), a variation of ...e student will proceed with embedded implementation and system integration in order to demonstrate a real-life application using sensor acquisition and m
    2 KB (317 words) - 11:10, 21 July 2020
  • ...mulator what happens if the GaAsSb/InP junction contains atomic roughness. In this case, momentum conservation is broken and L-valley electrons might eve : Interest in device modeling
    3 KB (377 words) - 15:44, 4 September 2019
  • ...ave several prototypes of batteryless sensor nodes which we want to deploy in a wide area network. * Integrating a LoRa radio in a batteryless sensor node
    3 KB (360 words) - 18:25, 28 January 2017
  • [[Category:In progress]] ...ned to allow us to sample as much data as possible during the short window in which we will have access to the facilities.
    3 KB (454 words) - 14:59, 25 October 2023
  • ...s even further. In this project you will implement a proof-of-concept chip in VHDL, to demonstrate the efficiency of the new architectures. To that end, ...from more theoretical/simulation based projects to the VLSI implementation in form of chip design projects.
    3 KB (508 words) - 11:12, 14 April 2016
  • ...Machine-, Supervisor-, and User-Mode) and address translation as described in the RISC-V privileged ISA [2]. ...stems and cloud computing to allow running untrusted OSes or multiple OSes in parallel.
    3 KB (391 words) - 08:49, 21 June 2022
  • ...s to a brute-force approach to combining this information. As a first step in your project, you will study ways to reduce the complexity on an algorithmi ===Status: In Progress ===
    3 KB (345 words) - 10:52, 5 April 2022
  • [[File:Power Optimization in Multipliers.jpg|thumb|160px]] ...lemented with standard-cells and that can be automated in order to be used in a synthesis-based flow.
    3 KB (386 words) - 16:23, 30 October 2020
  • '''Motivation''' In recent years, the popularity of unmanned aerial vehicles (UAV’s) has soar ...on, it suffers from very large charging times and very short flight times. In this
    3 KB (403 words) - 20:45, 9 August 2016
  • ...could provide better performance than standard ones. The key idea consists in using a core/shell nanowire structure where the core and the shell have dif : Interest in device modeling
    3 KB (357 words) - 15:38, 4 September 2019

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