User contributions
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- 11:29, 10 August 2021 (diff | hist) . . (+4,032) . . N Efficient Memory Stream Handling in RISC-V-based Systems (M/1-2S) (Created page with "<!-- Efficient Memory Stream Handling in RISC-V-based Systems (M/1-2S) --> <!-- TODO: remove safety Category:Digital Category:High Performance SoCs Category:Computer...")
- 11:27, 10 August 2021 (diff | hist) . . (+10) . . m Universal Stream Semantic Registers for Snitch (1S)
- 11:21, 10 August 2021 (diff | hist) . . (+3,205) . . N Universal Stream Semantic Registers for Snitch (1S) (Created page with "<!-- Universal Stream Semantic Registers for Snitch (1S) --> <!-- TODO: unlock safety Category:Digital Category:High Performance SoCs Category:Computer Architecture...")
- 11:07, 10 August 2021 (diff | hist) . . (+124) . . Digital (→Completed Projects)
- 19:57, 29 July 2021 (diff | hist) . . (+9) . . m SystemVerilog formatter for our LowRISC-based guidelines (2-3G) (current)
- 15:25, 9 July 2021 (diff | hist) . . (-4) . . Physical Implementation of Ara, PULP's Vector Machine (1-2S) (current)
- 15:21, 9 July 2021 (diff | hist) . . (-21) . . Towards the Ariane Desktop: Display Output for Ariane on FPGA under Linux (S/B/G) (current)
- 15:21, 9 July 2021 (diff | hist) . . (-4) . . Ottocore: A Minimal RISC-V Core Designed for Teaching (B/2G) (current)
- 15:20, 9 July 2021 (diff | hist) . . (-4) . . LLVM and DaCe for Snitch (1-2S) (current)
- 15:19, 9 July 2021 (diff | hist) . . (-19) . . Investigation of the high-performance multi-threaded OoO IBM A2O Core (1-3S) (current)
- 15:19, 9 July 2021 (diff | hist) . . (-2) . . Bringup and Evaluation of an Energy-efficient Heterogeneous Manycore Compute Platform (1-2S) (current)
- 15:18, 9 July 2021 (diff | hist) . . (-2) . . m A Snitch-Based SoC on iCE40 FPGAs (1-2S/B) (current)
- 15:18, 9 July 2021 (diff | hist) . . (0) . . m An RPC DRAM Implementation for Energy-Efficient ASICs (1-2S) (current)
- 15:17, 9 July 2021 (diff | hist) . . (-2) . . An RPC DRAM Implementation for Energy-Efficient ASICs (1-2S)
- 15:17, 9 July 2021 (diff | hist) . . (-2) . . A Snitch-Based SoC on iCE40 FPGAs (1-2S/B)
- 15:19, 20 April 2021 (diff | hist) . . (+24) . . High Performance SoCs (→Who are we)
- 23:31, 1 April 2021 (diff | hist) . . (+8) . . Investigation of the high-performance multi-threaded OoO IBM A2O Core (1-3S)
- 23:31, 1 April 2021 (diff | hist) . . (+30) . . N Category:Lbertaccini (Redirected page to User:Lbertaccini) (current)
- 23:27, 1 April 2021 (diff | hist) . . (+2) . . Investigation of the high-performance multi-threaded OoO IBM A2O Core (1-3S)
- 15:40, 15 March 2021 (diff | hist) . . (-4) . . m A Flexible Peripheral System for High-Performance Systems on Chip (M) (current)
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