User contributions
From iis-projects
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- 15:19, 9 July 2021 (diff | hist) . . (-2) . . Bringup and Evaluation of an Energy-efficient Heterogeneous Manycore Compute Platform (1-2S) (current)
- 15:18, 9 July 2021 (diff | hist) . . (-2) . . m A Snitch-Based SoC on iCE40 FPGAs (1-2S/B) (current)
- 15:18, 9 July 2021 (diff | hist) . . (0) . . m An RPC DRAM Implementation for Energy-Efficient ASICs (1-2S) (current)
- 15:17, 9 July 2021 (diff | hist) . . (-2) . . An RPC DRAM Implementation for Energy-Efficient ASICs (1-2S)
- 15:17, 9 July 2021 (diff | hist) . . (-2) . . A Snitch-Based SoC on iCE40 FPGAs (1-2S/B)
- 15:19, 20 April 2021 (diff | hist) . . (+24) . . High Performance SoCs (→Who are we)
- 23:31, 1 April 2021 (diff | hist) . . (+8) . . Investigation of the high-performance multi-threaded OoO IBM A2O Core (1-3S)
- 23:31, 1 April 2021 (diff | hist) . . (+30) . . N Category:Lbertaccini (Redirected page to User:Lbertaccini) (current)
- 23:27, 1 April 2021 (diff | hist) . . (+2) . . Investigation of the high-performance multi-threaded OoO IBM A2O Core (1-3S)
- 15:40, 15 March 2021 (diff | hist) . . (-4) . . m A Flexible Peripheral System for High-Performance Systems on Chip (M) (current)
- 13:28, 7 March 2021 (diff | hist) . . (+10,678) . . N Online Learning of User Features (1S) (Created page with "<!-- Online Learning of User Features (1S) --> = Overview = == Status: Available == * Type: Semester Thesis * Professor: Prof. Dr. L. Benini * Supervisors: ** Cristian Ciof...")
- 13:17, 7 March 2021 (diff | hist) . . (0) . . N File:KWS.png (current)
- 13:17, 7 March 2021 (diff | hist) . . (0) . . N File:KWS+UE.png (current)
- 20:12, 15 February 2021 (diff | hist) . . (+1) . . LLVM and DaCe for Snitch (1-2S) (→Status: In progress)
- 20:07, 15 February 2021 (diff | hist) . . (+11,100) . . N LLVM and DaCe for Snitch (1-2S) (Created page with "<!-- LLVM and DaCe for Snitch (1-2S) --> = Overview = == Status: In progress == * Type: Semester Thesis * Semester: Spring Semester 2021 * Student: Noah Hütter * Start: Ma...")
- 20:02, 15 February 2021 (diff | hist) . . (+76) . . Quest for the smallest Turing-complete core (2-3G) (Redirected page to Ottocore: A Minimal RISC-V Core Designed for Teaching (B/2G)) (current)
- 19:57, 15 February 2021 (diff | hist) . . (+10,538) . . N Ottocore: A Minimal RISC-V Core Designed for Teaching (B/2G) (Created page with "<!-- Ottocore: A Minimal RISC-V Core Designed for Teaching (B/2G) --> = Overview = == Status: In progress == * Type: Bachelor's Thesis * Semester: Spring Semester 2021 * St...")
- 18:36, 15 February 2021 (diff | hist) . . (+36) . . m An RPC DRAM Implementation for Energy-Efficient ASICs (1-2S)
- 18:26, 15 February 2021 (diff | hist) . . (0) . . m Bringup and Evaluation of an Energy-efficient Heterogeneous Manycore Compute Platform (1-2S)
- 18:25, 15 February 2021 (diff | hist) . . (+3) . . Bringup and Evaluation of an Energy-efficient Heterogeneous Manycore Compute Platform (1-2S)
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