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Showing below up to 20 results in range #41 to #60.

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41. Audio Visual Speech Recognition (1S/1M)‏‎ (2 revisions)
42. Benchmarking a heterogeneous 217-core MPSoC on HPC applications (M/1-3S))‏‎ (2 revisions)
43. Structural Health Monitoring (SHM) System (1-2S/M)‏‎ (2 revisions)
44. A Demonstrator of Non-Synchronized Hyperdimensional Body Area Networks‏‎ (2 revisions)
45. Design of a Reconfigurable Vector Processor Cluster for Area Efficient Radar Processing (1M)‏‎ (2 revisions)
46. Ab-initio Simulation of Strained Thermoelectric Materials‏‎ (2 revisions)
47. Christoph Leitner‏‎ (2 revisions)
48. Ultrasound‏‎ (2 revisions)
49. Adaptively Controlled Hysteresis Curve Tracer For Polymer Piezoelectrics (1 S/B)‏‎ (2 revisions - redirect page)
50. Improving SystemVerilog Support for Free And Open-Source EDA Tools (1-3S/B)‏‎ (2 revisions)
51. Exploitation of Inherent Error Resilience of Wireless Systems under Unreliable Silicon‏‎ (2 revisions)
52. High-Resolution, Calibrated Folding ADCs‏‎ (2 revisions)
53. Ottocore: A Minimal RISC-V Core Designed for Teaching (B/2G)‏‎ (2 revisions)
54. Development Of A Test Bed For Ultrasonic Transducer Characterization‏‎ (2 revisions - redirect page)
55. Using Motion Sensors to Support Indoor Localization‏‎ (2 revisions)
56. Enhancing Our DMA Engine With Virtual Memory (M/1-3S/B)‏‎ (2 revisions)
57. Convolution Neural Networks on our Ultra-Low Power Mult-Core Plattform PULP‏‎ (2 revisions)
58. Design of a Scalable High-Performance and Low-Power Interface Based on the I3C Protocol (1-3S/B)‏‎ (2 revisions)
59. Waterflow Monitoring with Doppler Ultrasound (1S)‏‎ (2 revisions)
60. Reconfigurability of SHA-3 candidates‏‎ (2 revisions)

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