Pages with the most revisions
From iis-projects
Showing below up to 50 results in range #501 to #550.
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- Ternary Neural Networks for Face Recognition (5 revisions)
- High-Throughput Authenticated Encryption Architectures based on Block Ciphers (5 revisions)
- A Wireless Sensor Network for a Smart Building Monitor and Control (5 revisions)
- Channel Shortening Prefilter (5 revisions - redirect page)
- Counter-based Fast Power Estimation using FPGAs (M/1-3S) (5 revisions)
- Implementation of a NB-IoT Positioning System (5 revisions)
- Energy-efficient Circuits for Fully Wireless Brain-machine Interfaces (5 revisions)
- Next-Gen Ultrasound Imaging Systems (Industry Student Projects & PhD Opportunity) (5 revisions)
- Phase-change memory devices for emerging computing paradigms (5 revisions)
- Indoor Smart Tracking of Hospital instrumentation (5 revisions)
- Beat DigRF (5 revisions)
- LLVM and DaCe for Snitch (1-2S) (5 revisions)
- Subject specific embeddings for transfer learning in brain-computer interfaces (5 revisions)
- Implementation of a Small and Energy-Efficient RISC-V-based Vector Accelerator (1M) (5 revisions)
- IBM A2O Core (5 revisions)
- Designing a Power Management Unit for PULP SoCs (5 revisions)
- Inductive Charging Circuit for Implantable Devices (5 revisions)
- Exploring feature selection and classification algorithms for ultra-low-power closed-loop systems for epilepsy control (5 revisions)
- Image Sensor Interface and Pre-processing (5 revisions)
- An Ultra-Compact High-Power CMOS Power Amplifier for Millimeter-Wave 5G Communications (5 revisions)
- Embedded Artificial Intelligence:Systems And Applications (5 revisions)
- Snitch meets iCE40 (1-2S/B) (5 revisions - redirect page)
- Hardware/software codesign neural decoding algorithm for “neural dust” (5 revisions)
- Toward Superposition of Brain-Computer Interface Models (5 revisions)
- Ultra Low Power Conversion Circuit For Batteryless Applications (5 revisions)
- FPGA Testbed Implementation for Bluetooth Indoor Positioning (5 revisions)
- 5G Cellular RF Front-end Design in 22nm CMOS Technology (5 revisions)
- Designing a Scalable Miniature I/O DMA (1-2B/1-3S/M) (5 revisions)
- Design of a Fused Multiply Add Floating Point Unit (5 revisions)
- Development of an efficient algorithm for quantum transport codes (5 revisions)
- Embedded Audio Source Localization Exploiting Coincidence Detection in Asynchronous Spike Streams (5 revisions)
- Low Latency Brain-Machine Interfaces (5 revisions)
- Eye tracking (5 revisions)
- Soft-Output Viterbi Equalizer as part of Evolved EDGE baseband ASIC (5 revisions)
- Toward hyperdimensional active perception: learning compressed sensorimotor control by demonstration (5 revisions)
- Ultra Low Power Wake Up Radio for Wireless Sensor Network (5 revisions)
- EEG artifact detection with machine learning (4 revisions)
- Variability Tolerant Ultra Low Power Cluster (4 revisions)
- Efficient TNN compression (4 revisions)
- NAND Flash Open Research Platform (4 revisions)
- Implementation of the RISC-V Bit Manipulation (RVB) extensions for our RI5CY core (4 revisions)
- Super Resolution Radar/Imaging at mm-Wave frequencies (4 revisions)
- Improving Resiliency of Hyperdimensional Computing (4 revisions)
- Every individual on the planet should have a real chance to obtain personalized medical therapy (4 revisions)
- AMZ Driverless Competition Embedded Systems Projects (4 revisions)
- IP-Based SoC Generation and Configuration (1-3S) (4 revisions)
- Influence of the Initial Filament Geometry on the Forming Step in CBRAM. (4 revisions)
- Jammer-Resilient Synchronization for Wireless Communications (4 revisions)
- Energy Neutral Multi Sensors Wearable Device (4 revisions)
- SSR combined with FREP in LLVM/Clang (M/1-3S) (4 revisions - redirect page)
