Search results

Create the page "System Software" on this wiki! See also the search results found.

• Ultra-low power processor design
  ...er, there is a lot of functionality which will never be used in the target system and it is therefore not necessary to maintain all this functionality. Remov ...of sensor and letting the processor process the sensed data, or running a software on the processor which controls a FPGA board or some other chip through the
  10 KB (1,669 words) - 19:01, 30 January 2014
• Template
  [[Category:System on Chips for IoTs]] [[Category:Biomedical System on Chips]]
  4 KB (397 words) - 15:44, 14 February 2023
• Adaptively Controlled Polarization And Hysteresis Curve Tracing For Polymer Piezoelectrics (1 S/B)
  ...ure in such a way that later studies will allow '''ML-based control of the system'''. ...architecture is to be designed in such a way that ML-based control of the system is possible.
  6 KB (741 words) - 18:14, 21 July 2023
• Reading The GSM Beacon Carrier with OsmocomBB and stoneEDGE
  the student will combine the IIS PHY with OsmocomBB software to build The IIS 2G testbed has no operating system (OS) running on
  3 KB (421 words) - 10:40, 6 November 2017
• CPS Software-Configurable State-Machine
  ...data over a wireless link. Some of these system even include an actuation system, which reacts depending on the captured data. ...nnected and operate and act collaboratively it is called a 'cyper-physical system' (CPS).
  3 KB (418 words) - 11:24, 10 November 2017
• Wireless Biomedical Signal Acquisition Device
  ...less link, e.g., to a PC or tablet running a visualization or data capture software. Although the wireless and battery-powered nature of this system reduces the impact of mains interference, its amplitude might nonetheless b
  2 KB (280 words) - 10:54, 10 March 2015
• Digitally-Controlled Analog Subtractive Sound Synthesis
  ...d (PCB) that implements the subtractive synthesizer. Finally, Raspberry Pi software must be developed in order to control the synthesizer's parameters in real- [[Category:System on Chips for IoTs]]
  5 KB (597 words) - 12:56, 4 December 2021
• MatPHY: An Open-Source Physical Layer Development Framework
  [[File:Setup of OsmoPHY together with RX board.png|thumb|Top: Software architecture of the MatPHY framework. Bottom: Setup of MatPHY together with ...upper layers of the OsmocomBB GSM protocol stack. The functionality of the system is verified with a testbed comprising a base station and a receiver board w
  3 KB (360 words) - 14:14, 27 May 2015
• Evolved EDGE Physical Layer Incremental Redundancy Architecture
  ...ssor and the unit where RLC blocks are processed for IR is attached to the system processor. The decoding of the RLC blocks takes place on a PHY Digital Sign ...ss Innovation Forum European Conference on Communications Technologies and Software Defined Radio (SDR-WInnComm-Europe 2013)'', pages 21–26, Munich, Germany,
  3 KB (397 words) - 14:12, 27 May 2015
• A Wireless Sensor Network for a Smart LED Lighting control
  ...sor and actuator networks (WSANs) possible. These networks are distributed system consisting of nodes with sensors, intelligence and actuator interconnected ...e power consumption reduction, reliability, functionality and optimize the system.
  3 KB (487 words) - 12:02, 27 January 2016
• Ultra Low Power Wake Up Radio for Wireless Sensor Network
  ...a low power radio wake up receiver can reduce the power consumption of the system while still keeping its response time low. Another role of the wake-up radi ...and receiver and it could include . Measurements on the performance of the system will be performed from the students in order to evaluate the distance, powe
  4 KB (613 words) - 19:54, 9 February 2015
• Infrared Wake Up Radio
  ...ices while still keeping its wake up time low. Another role of the wake-up system is that based on "intelligence" to select a specific device which has to be ...and receiver and it could include . Measurements on the performance of the system will be performed from the students in order to evaluate the distance, powe
  3 KB (515 words) - 19:55, 9 February 2015
• Audio DAC Conversion Jitter Measurement System
  ...o experienced students) comprises the implementation of such a measurement system. Possible approaches include a cross-correlating spectrum analyzer or the u : 20% Software Implementation
  2 KB (251 words) - 20:06, 17 February 2015
• Improving Scene Labeling with Hyperspectral Data
  ...uld be to evaluate and integrate this camera into a working scene labeling system [[http://dl.acm.org/citation.cfm?id=2744788 paper]] and would be very diver * create a software interface to read the imaging data from the camera
  6 KB (941 words) - 11:29, 5 February 2016
• Android Software Design
  [[File:Android Software Design.jpg|thumb]] ...processing for, e.g., heart-beat rate read-out in an ECG is desirable. The software should further include a GUI for the configuration of the data acquisition
  2 KB (278 words) - 16:57, 12 July 2022
• PULP
  [[File:pulp_block_diag.png|thumb|400px|Basic block diagram of a PULP system.]] ...d Systems] (EEES) group of UNIBO to develop an open, scalable Hardware and Software research platform with the goal to break the pJ/op barrier within a power e
  10 KB (1,563 words) - 10:09, 19 August 2022
• Indoor Positioning with Bluetooth
  [[Category:System Design]] [[Category:Software]]
  3 KB (449 words) - 12:12, 4 November 2019
• OpenRISC SoC for Sensor Applications
  ...r OpenRISC core with the following capabilities so that a standalone small system can be designed that can directly interface with various sensors and can co : For low power operations, we would like to shutdown most of the system including the processor, and wait until there is an event that requires the
  4 KB (667 words) - 15:23, 23 December 2016
• Hardware Accelerator for Model Predictive Controller
  In recent years reseach works shows that thermal evolution of a multicore system can be effectively modelled with linear state-space representation enabling ...will then be part of a larger system and be part of the thermal management system. In this project the goal is to implement a novel MPC algorithm in hardware
  3 KB (456 words) - 08:35, 20 January 2021
• Thermal Control of Mobile Devices
  ...s an heterogeneous thermal profile which is highly dependent on the actual system usage. As a matter of fact today and future mobile devices are thermally li ...thermal model can be directly identified from the target device by mean of system identification and self-calibrating routines.
  3 KB (452 words) - 11:03, 10 February 2015
• Real-Time Pedestrian Detection For Privacy Enhancement
  : 20% Software Development, 60% FPGA Development & Verification : or 80% software development
  3 KB (408 words) - 13:17, 5 February 2016
• Physical Layer Implementation of HSPA+ 4G Mobile Transceiver
  ...der to facilitate a cost-effective network upgrade that is based solely on software upgrade without the need for replacing the operator's network equipment. ...tionality of a standard-compliant physical layer of a mobile communication system. Possibly, the student can also investigate and analyze an interesting perf
  1 KB (159 words) - 11:16, 23 September 2016
• Digital Transmitter for Cellular IoT
  ...the first EC-GSM capable transmitter implementation worldwide (except for software defined prototypes). [1] ''Cellular system support for ultra-low complexity and low throughput Internet of Things (CIo
  3 KB (384 words) - 16:41, 17 July 2016
• Real-Time Optical Flow Using Neural Networks
  [[Category:Digital]] [[Category:Software]] [[Category:Completed]] [[Category:Semester Thesis]] [[Category:Lukasc]] [ [[Category:Digital]] [[Category:System Design]]
  5 KB (707 words) - 11:22, 5 February 2016
• PULPonFPGA: Lightweight Virtual Memory Support - Software Cache
  ...erogeneous uniform memory access (hUMA) as envisioned by the Heterogeneous System Architecture (HSA) foundation, their low-power counterparts targeting the e ...L1 scratchpad memory, and the shared main memory to optimally exploit the system's memory hierarchy and to achieve high performance.
  5 KB (716 words) - 13:43, 29 November 2019
• High-speed Scene Labeling on FPGA
  ...an ethernet adapter. As opposed to an ASIC project, such FPGA and hardware-software codesign work is much more applicable in industry and less constrained in t ...to programmable logic and design an entire hetergeneous system using with software, FPGA fabric and hardwired interfaces.
  8 KB (1,197 words) - 18:18, 29 August 2016
• PULPonFPGA: Lightweight Virtual Memory Support - Coherency Extensions
  ...erogeneous uniform memory access (hUMA) as envisioned by the Heterogeneous System Architecture (HSA) foundation, their low-power counterparts targeting the e ...ators into embedded heterogeneous SoCs. We have developed a mixed hardware/software solution to enable lightweight virtual memory support for many-core acceler
  4 KB (585 words) - 17:57, 7 November 2017
• PULPonFPGA: Lightweight Virtual Memory Support - Multi-Level TLB
  ...erogeneous uniform memory access (hUMA) as envisioned by the Heterogeneous System Architecture (HSA) foundation, their low-power counterparts targeting the e ...ators into embedded heterogeneous SoCs. We have developed a mixed hardware/software solution to enable lightweight virtual memory support for many-core acceler
  4 KB (554 words) - 17:57, 7 November 2017
• Autonomous Sensing For Trains In The IoT Era
  ...ther important results will be provided by the combination of hardware and software co-design to achieve the ambitious goal of placing the smart sensor never r ...classification accuracy and energy efficiency and to further optimize the system.
  6 KB (774 words) - 08:36, 23 November 2022
• Switched Capacitor Based Bandgap-Reference
  [[Category:System Design]] [[Category:System Design]]
  4 KB (471 words) - 11:13, 3 May 2018
• Autonomous Smart Watches: Hardware and Software Desing
  ...classification accuracy and energy efficiency and to further optimize the system. : Interest in Computer Architectures at system level
  3 KB (448 words) - 11:59, 28 July 2015
• Improving our Smart Camera System
  ...hose in our prototype, and otherwise improve it by building a more compact system, adding communication capabilities to transmit suspicious cases to a remote [[Category:Digital]] [[Category:System]] [[Category:Semester Thesis]] [[Category:Group Work]]
  8 KB (1,176 words) - 16:26, 30 October 2020
• Efficient Implementation of an Active-Set QP Solver for FPGAs
  ...essing system on the Xilinx Zynq platform, and establish the corresponding software interface. : Matlab, C++, VHDL or System Verilog
  4 KB (542 words) - 12:39, 1 June 2017
• Development of a Rockfall Sensor Node
  ...ill be performed, with the main goal to develop the complete data-grabbing software and perform real-world tests in collaboration with SLF Davos. [[Category:System Design]]
  2 KB (340 words) - 11:55, 21 August 2018
• FPGA System Design for Computer Vision with Convolutional Neural Networks
  [[File:origami-fpga-system.png|400px|thumb]] ...o finish the processing pipeline (activation, pooling), and completing the system by connecting a camera or loading a video stream and displaying the results
  3 KB (397 words) - 18:17, 29 August 2016
• Learning Image Decompression with Convolutional Networks
  <!--[[File:origami-fpga-system.png|400px|thumb]] --> ...emester Thesis]] [[Category:Master Thesis]] [[Category:Lukasc]] [[Category:Software]] [[Category:2016]]
  2 KB (285 words) - 18:16, 29 August 2016
• Change-based Evaluation of Convolutional Neural Networks
  [[Category:Software]] [[Category:System]] [[Category:Completed]] [[Category:Semester Thesis]] [[Category:2016]] * Interest in computer vision and system engineering
  5 KB (747 words) - 18:04, 29 August 2016
• Using Motion Sensors to Support Indoor Localization
  • Experience in software engineering for embedded systems [[Category:System Design]]
  3 KB (426 words) - 11:41, 21 July 2017
• Turbo Equalization for Cellular IoT
  ...wn approach to improve the overall performance of a wireless communication system. The underlying principle is to feed back soft information from the channel [[Category:System Design]]
  3 KB (450 words) - 11:43, 13 November 2018
• PULPonFPGA: Hardware L2 Cache
  ...w evaluation platform based on the Juno ARM Development Platform [3]. This system combines a modern ARMv8 multicluster CPU with a Xilinx Virtex-7 XC7V2000T F : VHDL/System Verilog, C
  5 KB (711 words) - 10:27, 5 November 2019
• NextGenChannelDec
  [[Category:System Design]] [[Category:Software]]
  3 KB (402 words) - 15:31, 13 April 2016
• Next Generation Channel Decoder
  [[Category:System Design]] [[Category:Software]]
  3 KB (418 words) - 14:01, 13 November 2020
• Implementation of a NB-IoT Positioning System
  ...he available NB-IoT-baseband implementation. This step includes a hardware-software co-design in which part of the algorithm will be mapped onto a PULP process : 40% Hardware/Software Co-Design (Programming in HDL and C)
  4 KB (555 words) - 16:36, 23 May 2018
• PULPonFPGA: Lightweight Virtual Memory Support - Page Table Walker
  ...ators into embedded heterogeneous SoCs. We have developed a mixed hardware/software solution to enable lightweight virtual memory support for many-core acceler ...latform [3]. In a first step, the page table walker will be implemented in software as part of the kernel-level driver module. After verifying and profiling th
  5 KB (712 words) - 17:57, 7 November 2017
• PULPonFPGA: Lightweight Virtual Memory Support - Physically Contiguous Memory
  ...ngs of arbitrary size, independent of the page size of the Linux operating system running on the host CPU. In a student project [4], a second, set-associativ ...and give access to it to user-space applications through, e.g., an mmap() system call. Ideally, all data shared with the accelerator is placed in this secti
  6 KB (866 words) - 13:43, 29 November 2019
• Self-Learning Drones based on Neural Networks
  [[Category:Energy Efficient Autonomous UAVs]] [[Category:Software]] [[Category:Digital]] [[Category:PULP]] [[Category:Completed]] [[Category: * synthesis scripts & relevant software models developed for verification
  6 KB (828 words) - 16:26, 20 February 2018
• A Wireless Sensor Network for a Smart Building Monitor and Control
  ...sor and actuator networks (WSANs) possible. These networks are distributed system consisting of nodes with sensors, intelligence and actuator interconnected ...e power consumption reduction, reliability, functionality and optimize the system.
  4 KB (571 words) - 21:42, 30 July 2018
• A Wearable System To Control Phone And Electronic Device Without Hands
  ..., televisions, pc among others. The main goal is to achieve an intelligent system that process the data from one or more sensors to understand the context an ...classification accuracy and energy efficiency and to further optimize the system.
  5 KB (669 words) - 17:22, 31 January 2018
• A Wireless Sensor Network for HPC monitoring
  ...sor and actuator networks (WSANs) possible. These networks are distributed system consisting of nodes with sensors interconnected by wireless links. We want ...e power consumption reduction, reliability, functionality and optimize the system.
  5 KB (617 words) - 16:22, 27 February 2018
• LightProbe - Frontend Firmware and Control Side Channel
  ...ard-FPGA and to implement the control sidechannel interface to the backend system (a PC in our case). * Design an interface/API such that the firmware can talk to the backend system (UART based)
  3 KB (458 words) - 20:51, 12 November 2020
• Charging System for Implantable Electronics
  Using mixed-signal SoCs developed at IIS it is possible to integrate a system to conducting medical research. Despite low power consumption of the system the
  3 KB (366 words) - 13:05, 27 April 2018
• Learning Image Compression with Convolutional Networks
  <!--[[File:origami-fpga-system.png|400px|thumb]] --> ...emester Thesis]] [[Category:Master Thesis]] [[Category:Lukasc]] [[Category:Software]]
  3 KB (362 words) - 16:25, 30 October 2020
• Open Power-On Chip Controller Study and Integration
  [[Category:Software]] [[Category:Available]] [[Category:Hot]] [[Category:Semester Thesis]] [[Ca ...nodes. Computing nodes based on ARM SoCs are facing the market, as well as system based on the IBM power architecture. To create more market opportunities IB
  3 KB (462 words) - 15:57, 9 September 2016
• Linux Driver for fine-grain and low overhead access to on-chip performance counters
  [[Category:Software]] [[Category:Available]] [[Category:Hot]] [[Category:Semester Thesis]] [[Ca ...ct access to the counter. Linux OS has already an [https://wiki.analog.com/software/linux/docs/iio/iio IIO-Subsystem] which allows to efficiently move time tra
  3 KB (417 words) - 15:55, 9 September 2016
• LightProbe - Design of a High-Speed Optical Link
  ...ansport this data-rate efficiently from the head to the backend processing system, we use a optical high-speed link. ...d software IPs. Using these IPs allows to build rather easily very complex system. You will be extensively working with the Xilinx Vivado Tool.
  3 KB (409 words) - 10:55, 10 January 2017
• PVT Dynamic Adaptation in PULPv3
  ...esis]] [[Category:2016]] [[Category:Barandre]][[Category:PULP]][[Category:System Design]] ...nts the software control loop which maximizes the energy efficiency of the system dynamically tracking the PVT variations
  3 KB (348 words) - 15:31, 13 September 2016
• Desing and Implementation Of Long Lasting Key Finder With Bleetooth Low Energy
  ...main goal of the design is to optimize the power consumption to allow the system to life several months without change the battery. THe project will be done : Interest in Computer Architectures at system level
  4 KB (502 words) - 11:38, 21 July 2017
• Efficient NB-IoT Uplink Design
  a software implementation is preferred firstly, while the transfer of specific tasks t and software can be used. The software shall be written in C and ported to the testbed with
  6 KB (900 words) - 16:58, 7 May 2018
• Sensor Fusion for Rockfall Sensor Node
  [[Category:System Software]]
  2 KB (352 words) - 11:51, 21 August 2018
• Interfacing PULP with a Brain-Inspired Ultra-Low Power Spiking Cochlea
  ...(IIS) we have been working on a Parallel Ultra-Low Power Processor (PULP) System for the past two years. PULP is intended to be used for near-sensor computi ...e with basic engineering tools (web search, basic usage of Linux operating system, compilers…) and of work independence
  9 KB (1,427 words) - 18:36, 5 September 2019
• Towards Online Training of CNNs: Hebbian-Based Deep Learning
  ...ast few years along the entire technological stack, from HW (e.g. the PULP system) to SW running on microcontrollers – in many cases using convolutional ne [[Category:Software]] [[Category:Available]] [[Category:Semester Thesis]] [[Category:Hot]] [[Ca
  6 KB (909 words) - 19:50, 30 May 2017
• LightProbe
  [[File:Ultralight.jpg|thumb|400px|Current Prototype System]] * Programming of software functions: Microcontroller Programming / Processing system programming (C/C++/CUDA)
  2 KB (254 words) - 14:14, 31 October 2020
• PULP-Shield for Autonomous UAV
  [[Category:Energy Efficient Autonomous UAVs]] [[Category:Software]] [[Category:Digital]] [[Category:PULP]] [[Category:Completed]] [[Category: * Familiarity with embedded system programming in C.
  6 KB (875 words) - 11:06, 23 February 2018
• Smart Wearable System For Vital Sign Monitoring Exploiting On Board and Cloud Machine Learning
  ...classification accuracy and energy efficiency and to further optimize the system. * Highlevel software programming, machine learning, wireless communication
  5 KB (703 words) - 17:21, 31 January 2018
• VLSI Implementation Polar Decoder using High Level Synthesis
  [[Category:System Design]] [[Category:Software]]
  3 KB (392 words) - 14:17, 5 April 2022
• FPGA-based Testbed Implementation of an Extended-Coverage Point-to-Point Communication Link for the Internet of Things
  [[Category:System Design]] [[Category:Software]]
  3 KB (462 words) - 13:54, 13 November 2020
• Energy-Efficient Brain-Inspired Hyperdimensional Computing
  ...L implementation of HD computing for an EMG-based hand gesture recognition system with fast learning using much lower power than ever before. [[Category:System Design]]
  4 KB (467 words) - 13:38, 10 November 2020
• Autoencoder Accelerator for On-Chip Semi-Supervised Learning
  * Knowledge of a hardware design language: e.g. (System)Verilog or VHDL * synthesis scripts & relevant software models developed for verification
  6 KB (842 words) - 08:37, 20 January 2021
• Embedded Audio Source Localization Exploiting Coincidence Detection in Asynchronous Spike Streams
  The goal of this project is to develop a software application running on a PULP Chip, enabling the extraction of meaningful c The prototype system on which the source localization application will be implemented is constit
  7 KB (1,025 words) - 19:52, 30 May 2017
• A computational memory unit using phase-change memory devices
  [[Category:System Design]] [[Category:Software]]
  4 KB (546 words) - 11:33, 17 April 2020
• Deep Learning for Brain-Computer Interface
  [[Category:System Design]] [[Category:Software]]
  3 KB (372 words) - 20:22, 1 April 2019
• Resilient Brain-Inspired Hyperdimensional Computing Architectures
  [[Category:System Design]] [[Category:Software]]
  3 KB (401 words) - 19:08, 29 January 2021
• Trace Debugger for custom RISC-V Core
  ...evelopment. It furthermore aids in bringing up silicon quickly and makes a software developer's life a lot easier. In smaller processors like the ones develope # Specification, RTL design and host software development of a trace debugger for one of our custom RISC-V processors.
  5 KB (729 words) - 11:27, 11 December 2018
• Efficient Search Design for Hyperdimensional Computing
  [[File:Hyperdimensional-Solar-System.jpg|thumb]] [[Category:System Design]]
  3 KB (366 words) - 15:39, 10 November 2020
• BigPULP: Multicluster Synchronization Extensions
  : a mixed hardware/software solution enabling lightweight, shared virtual memory (SVM) between host CPU both dramatically simplifying the programmability of such a heterogeneous system.
  6 KB (805 words) - 12:17, 22 January 2018
• BigPULP: Shared Virtual Memory Multicluster Extensions
  : a mixed hardware/software solution enabling lightweight, shared virtual memory (SVM) between host CPU both dramatically simplifying the programmability of such a heterogeneous system.
  6 KB (801 words) - 15:05, 23 August 2018
• Smart Virtual Memory Sharing
  initiatives such as the Heterogeneous System Architecture foundation (HSA) are access to system memory from both sides, eliminating the need for explicit
  6 KB (865 words) - 12:16, 17 November 2017
• Autonomous Sensors For Underwater Monitoring In Smart Navy Systems
  ...detectors) to reduce the power consumption but also use energy harvesting system such as microbial fuel cell. The communication plays also an important role ...s. Other important results will be provided by combination of hardware and software co-design to achieve the ambitious goal of placing the smart sensor never r
  5 KB (745 words) - 17:21, 31 January 2018
• Hyper Meccano: Acceleration of Hyperdimensional Computing
  [[Category:System Design]] [[Category:Software]]
  3 KB (409 words) - 13:58, 9 November 2017
• High Speed FPGA Trigger Logic for Particle Physics Experiments
  [[Category:System Design]] [[Category:System on Chips for IoTs]]
  4 KB (460 words) - 21:42, 30 January 2018
• Satellite Internet of Things
  ...nology to cellular connectivity by covering dead spots or as a stand-alone system. NB-IoT itself is seen as a possible technology for satellite IoT (sIoT) an ...upport satellite communication channels. A thorough simulative analysis of system performance will enable the identification of critical bottlenecks. These s
  3 KB (393 words) - 13:53, 13 November 2020
• Neural Networks Framwork for Embedded Plattforms
  : 80% software development [[Category:System Design]]
  3 KB (317 words) - 14:40, 14 April 2021
• HERO: TLB Invalidation
  : a mixed hardware/software solution enabling lightweight, shared virtual memory (SVM) between host CPU both dramatically simplifying the programmability of such a heterogeneous system.
  6 KB (796 words) - 17:19, 18 November 2019
• Interference Cancellation for the cellular Internet of Things
  ...es to instant deployment scenarios, since the base stations simply needs a software upgrade. The mobile station, however, requires a redesign. The latter is no ...is a great cellular IoT research opportunity and gives deep insights into system engineering.
  2 KB (269 words) - 13:15, 31 October 2019
• Deep Convolutional Autoencoder for iEEG Signals
  ...detection and location of such seizures. When aiming a low power implanted system the large amount of data has to be efficiently reduced. iEEG signals are sp * synthesis scripts & relevant software models developed for verification
  5 KB (641 words) - 13:36, 9 September 2020
• Heterogeneous SoCs
  [[File:HERO_HW_and_SW.png|500px|thumb|right|The hardware and software stack of our Heterogeneous Embedded Research Platform (HERO).]] ...exploit their theoretical potential is challenging due to the high overall system complexity.
  3 KB (421 words) - 18:41, 28 October 2020
• Predictable Execution
  ...be deployed on COTS hardware that limit the memory interference within the system, such that real-time guarantees can be provided, enabling the use of these
  2 KB (286 words) - 18:48, 10 November 2020
• Energy Efficient Autonomous UAVs
  [[Category:Software]] [[Category:Digital]] [[Category:PULP]] [[Category:Dpalossi]] ...ize, and will thus constitute an increasingly larger fraction of the total system power consumption.
  14 KB (2,077 words) - 15:02, 13 June 2022
• Aliasing-Free Wavetable Music Synthesizer
  [[Category:System on Chips for IoTs]] [[Category:Biomedical System on Chips]]
  5 KB (621 words) - 18:09, 9 October 2022
• Modular Frequency-Modulation (FM) Music Synthesizer
  [[Category:System on Chips for IoTs]] [[Category:Biomedical System on Chips]]
  5 KB (549 words) - 12:35, 28 November 2022
• Digital Medical Ultrasound Imaging
  At IIS, we are exploring the next generation of medical ultrasound system. Our Flagship projects are: ...rable solutions as well as alternatives to the traditional bulky and rigid system designs.
  6 KB (797 words) - 16:16, 23 February 2024
• CMOS power amplifier for field measurements in MRI systems
  [[Category:System Design]] [[Category:System Design]]
  3 KB (354 words) - 16:06, 6 May 2019
• Real-Time Implementation of Quantum State Identification using an FPGA
  ...t the FPGA hardware using Verilog or VHDL. You will use Xilinx ISE, Xilinx System Generator, Chipscope, Modelsim, Matlab and Mathamatica as development tools [[Category:System Design]]
  5 KB (599 words) - 09:03, 21 December 2017
• Inductive Charging Circuit for Implantable Devices
  [[Category:System Design]] [[Category:System Design]]
  3 KB (329 words) - 11:43, 20 August 2021
• Low Power Geolocalization And Indoor Localization
  ...classification accuracy and energy efficiency and to further optimize the system. * High-level software programming, machine learning, wireless communication
  5 KB (697 words) - 13:36, 11 January 2018
• Low Power One bit Microphone for Acoustic Imaging Using A Parallel Processor
  3D sonar sensors. The proposed system architecture will be developed around an Ultra low power parallel processor * Design of the full system to achieve an autonomous sensor. (PCB design, Low power Techniques, etc.)
  4 KB (518 words) - 11:40, 2 February 2018
• Wake Up Radio For Energy Efficient Communication System and IC Design
  ...he student he can be involved on the design of the IC, the layout, or at a system and application levler. The wake-up receiver should achieves power consumpt ...classification accuracy and energy efficiency and to further optimize the system.
  5 KB (686 words) - 11:54, 2 February 2018
• Zero Power Touch Sensor and Reciever For Body Communication
  ...on the human body. The student will work to design a whole application and system exploiting the zero-power communication receiver/sensor. ...classification accuracy and energy efficiency and to further optimize the system.
  4 KB (585 words) - 11:58, 2 February 2018
• Monocular Vision-based Object Following on Nano-size Robotic Blimp
  [[Category:Hot]] [[Category:Energy Efficient Autonomous UAVs]] [[Category:Software]] [[Category:Digital]] [[Category:PULP]] [[Category:Available]] [[Category: * Familiarity with embedded system programming in C.
  5 KB (623 words) - 16:14, 20 February 2018
• Towards Autonomous Navigation for Nano-Blimps
  [[Category:Energy Efficient Autonomous UAVs]] [[Category:Software]] [[Category:Digital]] [[Category:PULP]] [[Category:Completed]] [[Category: * Familiarity with embedded system programming in C.
  7 KB (1,008 words) - 16:20, 20 February 2018

View (previous 100 | next 100) (20 | 50 | 100 | 250 | 500)